Qromis, Inc.

Avogy, Inc.

Ozgur Aktas

Vladimir Odnoblyudov

Cem Basceri

Dilip Risbud

Shari Farrens

Isik C Kizilyalli

Steve Lester

Hui Nie

Thomas R Prunty

Quentin Diduck

Dave P Bour

A monolithic microwave integrated circuit (MMIC) system includes a growth substrate, a device layer coupled to the growth substrate, a plurality of MMIC device elements coupled to the device layer, and a plurality of metallization structures coupled to the plurality of MMIC device elements. The MMIC system also includes a carrier substrate coupled to the plurality of metallization structures and a cooling structure coupled to the carrier substrate.

Systems for fabrication of MMIC and RF devices on engineered substrates

A method of forming a doped gallium nitride (GaN) layer includes providing a substrate structure, including a gallium nitride layer, forming a dopant source layer over the gallium nitride layer, and depositing a capping structure over the dopant source layer. The method also includes annealing the substrate structure to diffuse dopants into the gallium nitride layer, removing the capping structure and the dopant source layer, and activating the diffused dopants.

Method and system for diffusing magnesium in gallium nitride materials using sputtered magnesium sources

An integrated circuit device includes an engineered substrate including a substantially single crystal layer and a buffer layer coupled to the substantially single crystal layer. The integrated circuit device also includes a plurality of semiconductor devices coupled to the buffer layer. The plurality of semiconductor devices can include a first power device coupled to a first portion of the buffer layer and a second power device coupled to a second portion of the buffer layer. The first power device includes a first channel region comprising a first end, a second end, and a first central portion disposed between the first end and the second end. The second power device includes a second channel region comprising a third end, a fourth end, and a second central portion disposed between the third end and the fourth end.

Integrated circuit devices with an engineered substrate

A method for making a multilayered device on an engineered substrate having a substrate coefficient of thermal expansion includes growing a buffer layer on the engineered substrate, and growing a first epitaxial layer on the buffer layer. The first epitaxial layer is characterized by an epitaxial coefficient of thermal expansion substantially equal to the substrate coefficient of thermal expansion.

Gallium nitride epitaxial structures for power devices

A method of fabricating a semiconductor structure includes providing an engineered substrate including a polycrystalline substrate, a barrier layer encapsulating the polycrystalline substrate, and a bonding layer coupled to the barrier layer. The method further includes forming a first silicon layer coupled to the bonding layer, forming a dielectric layer coupled to the first silicon layer, forming a second silicon layer coupled to the dielectric layer, removing a portion of the second silicon layer and a corresponding portion of the dielectric layer to expose a portion of the first silicon layer, forming a gallium nitride (GaN) layer coupled to the exposed portion of the first silicon layer, forming a gallium nitride (GaN) based device coupled to the GaN layer, and forming a silicon-based device coupled to a remaining portion of the second silicon layer.

System for integration of elemental and compound semiconductors on a ceramic substrate

A substrate for RF devices includes a polycrystalline ceramic core and an interlayer structure. The interlayer structure includes a first silicon oxide layer coupled to the polycrystalline ceramic core, a polysilicon layer coupled to the first silicon oxide layer, a second silicon oxide layer coupled to the polysilicon layer, a barrier layer coupled to the second silicon oxide layer, a third silicon oxide layer coupled to the barrier layer, and a substantially single crystalline silicon layer coupled to the third silicon oxide layer.

RF device integrated on an engineered substrate

A method of forming a plurality of devices on an engineered substrate structure includes forming an engineered substrate by providing a polycrystalline ceramic core, encapsulating the polycrystalline ceramic core with a first adhesion shell, encapsulating the first adhesion shell with a barrier layer, forming a bonding layer on the barrier layer, and forming a substantially single crystal layer coupled to the bonding layer. The method further comprises forming a buffer layer coupled to the substantially single crystal layer, forming one or more epitaxial III-V layers on the buffer layer according to requirements associated with the plurality of devices, and forming the plurality of devices on the substrate by removing a portion of the one or more epitaxial III-V layers disposed between the plurality of devices and removing a portion of the buffer layer disposed between the plurality of devices.

Systems and method for integrated devices on an engineered substrate

A semiconductor diode includes an engineered substrate including a substantially single crystal layer, a buffer layer coupled to the substantially single crystal layer, and a semi-insulating layer coupled to the buffer layer. The semiconductor diode also includes a first N-type gallium nitride layer coupled to the semi-insulating layer and a second N-type gallium nitride layer coupled to the first N-type gallium nitride layer. The first N-type gallium nitride layer has a first doping concentration and the second N-type gallium nitride layer has a second doping concentration less than the first doping concentration. The semiconductor diode further includes a P-type gallium nitride layer coupled to the second N-type gallium nitride layer, an anode contact coupled to the P-type gallium nitride layer, and a cathode contact coupled to a portion of the first N-type gallium nitride layer.

Methods of manufacturing vertical semiconductor diodes using an engineered substrate

A micro-electromechanical system (MEMS) device includes a support structure comprising a polycrystalline ceramic core, a first adhesion layer coupled to the polycrystalline ceramic core, a conductive layer coupled to the first adhesion layer, a second adhesion layer coupled to the conductive layer, and a barrier layer coupled to the second adhesion layer. The support structure defines a cavity. The MEMS device also includes a III-V membrane coupled to a portion of the support structure. A portion of the III-V membrane is suspended over the cavity defined by the support structure and defines a MEMS structure.

Gallium-nitride based devices implementing an engineered substrate structure

A method of forming doped regions by diffusion in gallium nitride materials includes providing a substrate structure including a gallium nitride layer and forming a mask on the gallium nitride layer. The mask exposes one or more portions of a top surface of the gallium nitride layer. The method also includes depositing a magnesium-containing gallium nitride layer on the one or more portions of the top surface of the gallium nitride layer and concurrently with depositing the magnesium-containing gallium nitride layer, forming one or more magnesium-doped regions in the gallium nitride layer by diffusing magnesium into the gallium nitride layer through the one or more portions. The magnesium-containing gallium nitride layer provides a source of magnesium dopants. The method further includes removing the magnesium-containing gallium nitride layer and removing the mask.

Method and system for forming doped regions by diffusion gallium nitride materials

A substrate structure includes a polycrystalline substrate, a plurality of thin film layers disposed on the polycrystalline substrate, a bonding layer coupled to at least a portion of the plurality of thin films, and a single crystal silicon layer joined to the bonding layer.

Aluminum nitride based Silicon-on-Insulator substrate structure

A method of forming a semiconductor device includes providing an engineered substrate, forming a gallium nitride layer coupled to the engineered substrate, forming a channel region coupled to the gallium nitride layer by forming an aluminum gallium nitride barrier layer on the front surface of the gallium nitride layer, forming a gate dielectric layer coupled to the aluminum gallium nitride barrier layer in the central portion of the channel region, forming a gate contact coupled to the gate dielectric layer, forming a source contact at the first end of the channel region, forming a via at the second end of the channel region, filling the via with a conductive material, forming a drain contact coupled to the via, removing the engineered substrate to expose the back surface of the epitaxial gallium nitride layer, and forming a drain pad on the back surface of the epitaxial gallium nitride layer.

Lateral high electron mobility transistor with integrated clamp diode

An electronic device includes a support structure comprising a polycrystalline ceramic core, a first adhesion layer coupled to the polycrystalline ceramic core, a conductive layer coupled to the first adhesion layer, a second adhesion layer coupled to the conductive layer, and a barrier layer coupled to the second adhesion layer. The electronic device also includes a buffer layer coupled to the support structure, a contact layer coupled to the buffer layer, and a field-effect transistor (FET) coupled to the contact layer.

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Pleasanton, CA, United States of America

Ozgur Aktas