Apple Inc.

University of Washington

Owen C Anderson

Aaftab A Munshi

Terence M Potter

Luis Henrique Ceze

Anthony P DeLaurier

Susan Jane Eggers

Michael J Swift

Emily Anne Fortuna

Mon Ping Wang

Charles Brissart

Ravi Ramaseshan

Techniques are disclosed relating to memory consistency in a memory hierarchy with relaxed ordering. In some embodiments, an apparatus includes a first level cache that is shared by a plurality of shader processing elements and a second level cache that is shared by the shader processing elements and at least a texture processing unit. In some embodiments, the apparatus is configured to execute operations specified by graphics instructions that include (1) an attribute of the operation that specifies a type of memory consistency to be imposed for the operation and (2) scope information for the attribute that specifies whether the memory consistency specified by the attribute should be enforced at the first level cache or the second level cache. In some embodiments, the apparatus is configured to determine whether to sequence memory accesses at the first level cache and the second level cache based on the attribute and the scope.

Memory consistency in graphics memory hierarchy with relaxed ordering

Ubershaders may be used in a graphics development environment as an efficiency tool because many options and properties may be captured in a single shader program. Each selectable option of property in the shader code may be tagged with an attribute to indicate the presence of the selection. The single shader program embodying the many selectable options and properties may be compiled to an intermediate version that also embodies the many options and properties, along with at least remnants of the tagging attributes. Upon a request for executable code including indications of the desired selectable options or properties, generation of the executable code may proceed such that it includes only the desire selectable options and properties and not other selectable options and properties embodied in the source code.

System and method for using ubershader variants without preprocessing macros

Devices and methods of providing hardware support for dynamic type checking are provided. In some embodiments, a processor includes a type check register and support for one or more checked load instructions. In some embodiments, normal load instructions are replaced by a compiler with the checked load instructions. In some embodiments, to perform a checked load, an error handler instruction location is stored in the type check register, and a type tag operand is compared to a type tag stored in the loaded memory location. If the comparison succeeds, execution may proceed normally. If the comparison fails, execution may be transferred to the error handler instruction. In some embodiments, type prediction is performed to determine whether a checked load instruction is likely to fail.

Systems and methods for hardware-assisted type checking

Growing community of inventors

San Jose, CA, United States of America

Owen C Anderson