Movidius Limited

Linear Algebra Technologies Limited

Ovidiu Andrei Vesa

David Macdara Moloney

Brendan Barry

Cormac Brick

Richard Richmond

David Donohoe

The present application relates generally to a parallel processing device. The parallel processing device can include a plurality of processing elements, a memory subsystem, and an interconnect system. The memory subsystem can include a plurality of memory slices, at least one of which is associated with one of the plurality of processing elements and comprises a plurality of random access memory (RAM) tiles, each tile having individual read and write ports. The interconnect system is configured to couple the plurality of processing elements and the memory subsystem. The interconnect system includes a local interconnect and a global interconnect.

Apparatus, systems, and methods for providing computational imaging pipeline

Apparatus, systems, and methods for providing configurable computational imaging pipeline

Growing community of inventors

Timisoara, Romania

Ovidiu Andrei Vesa