Storage Technology Corporation

International Business Machines Corporation

Oracle America, Inc.

Otto Richard Buhler

Kevin M Horn

Forest Dillinger

Kevin Dale McKinstry

Jeffrey M Waynik

Ricky Lee Ewasko

Jeffrey Glenn Villiard

Peter Thomas Marino

Karl Sauter

Charles Grasso

Homer J Gardner

John C Twombly

Brian A Simpson

An improved technique for power distribution for use by high speed integrated circuit devices. A mixture of high dielectric constant, Er and low Er materials are used in a dielectric layer sandwiched between the voltage and ground planes of a printed circuit board that is used to fixture one or more integrated circuit devices. The low Er material is used in an area contained by the location of the integrated circuit device and its corresponding decoupling capacitors located nearby. High Er material is used in areas between the regions of low Er material. The low Er material improves that speed at which current from an adjoining decoupling capacitor can propagate to a power pin of the integrated circuit device. The high Er material mitigates cross-coupling of noise between the low Er regions.

Power distribution for high-speed integrated circuits

A system for reducing signal crosstalk in a flexible trace interconnect array includes a flexible dielectric material base, and a plurality of conductors longitudinally arranged as pairs in a signal layer array on the base. At least one of the pairs of conductors comprises a twisted pair.

System and method for crosstalk reduction in a flexible trace interconnect array

A system and method for improved power plane decoupling. In a preferred embodiment, two dielectric layers with different dielectric constants are separated by a first conducting layer. Second and third conducting layers are positioned outside the two dielectric layers, forming a conductor-dielectric-conductor-dielectric-conductor stack. The two outer conducting layers contact each other periodically through vias made in the conducting layers, adding high dielectric constant capacitance to the plane structure for short time intervals. The lower dielectric constant material provides high propagation speed coupling to the high dielectric constant material.

Power plane decoupling

Data signal dropout may cause loss of synchronization between the data signal and a data clock. A dropout resistant system for generating the data clock synchronized to the data signal includes a phase-locked loop. The phase-locked loop outputs the data clock having frequency and phase based on phase difference between the data signal and the data clock. The phase-locked loop holds constant the data clock frequency and minimizes phase shift during periods when an indication of the data signal quality drops beneath a threshold level.

Dropout resistant phase-locked loop

A wiring apparatus for reducing electromagnetic interference between conductive wires is provided. Wire pairs are incorporated into rigid or flexible printed circuits to precisely control loop alignment and phase differences. This precise alignment helps to cancel radiated electromagnetic fields and reduce voltage polarities induced in nearby wires. In one embodiment, a pair of parallel wires is aligned parallel to a second, twisted pair of wires. In another embodiment, two twisted pairs of wires, with identical loop lengths, are aligned parallel to each other and offset by exactly one half loop length. In a third embodiment, two twisted pairs of wires are aligned parallel to each other, in which one pair has a loop length that is an integer ratio of the other pair.

Crosstalk reduction in constrained wiring assemblies

Low voltage switched loads, such as magnetic tape write drivers, require a power source with a regulated voltage. A voltage regulator circuit includes a switched voltage regulator having an unregulated voltage input connected to an unregulated voltage source and an enabling input. The voltage regulator produces a regulated voltage at an output when the enabling input is asserted and produces high impedance at the output when the enabling input is unasserted. A capacitor is connected between the regulated voltage output and common voltage. A controlled precharge switch in series with a precharge resistor is connected between the unregulated source and the regulated voltage output. The precharge switch has a precharging input which closes the precharge switch when the precharging input is asserted. The circuit also includes a control logic operative to unassert the enabling input, assert the precharging input to close the precharging switch, unassert the precharging input after sufficient time to charge the capacitor to a voltage substantially the same as the regulated voltage, and assert the enabling input.

Switched load voltage regulation circuit

A system and method for a computer based system for enabling data phase clock corrections. Basing these corrections primarily on errors that cause consistent phase shift errors while reducing the effect of random data phase errors. An improved phase-locked loop (PLL) is used where multiple data bits are examined simultaneously, allowing us to examine 'apparent future' and 'apparent late' data. The average phase adjustment to the data window is calculated based upon the examined data bits.

Intelligent phase detector

Initial start up conditions for an oscillator having an inductor and capacitor coupled as a frequency determining resonant circuit are established by current generators. The current levels correlate to the steady state operating levels of the oscillator. Switching elements are actuated so as to gate the oscillator into immediate steady state operation without start up transient distortion by reconfiguring the relationship of the current sources to the oscillator elements.

Sinusoidal oscillator with instant start-up

A system for reading information stored on a flexible magnetic disk is disclosed. The system involves an amplitude detector for detecting at predetermined times whether the amplitude of the read signal is positive, zero or negative. This system includes an amplifier for the differential raw data signal whose gain is variable in response to changes in the amplitude of the raw data signal which occur over a relatively long period. The output of the automatic gain control amplifier is an equalized differential signal applied to the detector and to a threshold generator which provides an output reference signal which is a predetermined percentage of the input signal, and which is capable of following relatively rapid changes in the amplitude of the input signal. A positive and negative comparator circuit continually compares the differential equalized data signal against the generated threshold reference signal. The outputs of these comparators are sampled at clock times established from a phase-locked loop which is synchronized by pulses derived from the peaks of the input data signal.

Amplitude sensitive three-level detector for derivative read back

A detection device for sensing malfunctions in a wide band power amplifier, driving the take-up spool motor of a reel-to-reel tape transport system, is disclosed. A feedback loop is connected from the output of the amplifier to a malfunction junction positioned at the input of the amplifier. The signal at the malfunction junction is monitored and compared with a predetermined range of standard reference signals. Whenever the malfunction junction signal is out of the predetermined range, the power amplifier is turned off thereby preventing damage to the tape. A filter means is positioned so as to desensitize the compare means until the amplifier is operating at steady state.

Growing community of inventors

Boulder, CO, United States of America

Otto Richard Buhler