Infineon Technologies Ag

Ottmar Geitner

Frank Winter

Andreas Grassmann

Wolfram Hable

Ivan Nikitin

Alexander Schwarz

Walter Hartner

Maciej Wojnowski

Alexander Herbrandt

Christian Neugirg

Ralf Otremba

Thorsten Meyer

Michael Bauer

Gottfried Beer

Josef Hoeglauer

Helmut Strack

Juergen Hoegerl

Xaver Schloegel

Markus Brunnbauer

Klaus Pressel

Inpil Yoo

Ulrich Wachter

Andre Uhlemann

Werner Kroeninger

Jürgen Högerl

Josef Schwaiger

Mehran Pour Mousavi

Andreas Stueckjuergen

Lothar Koenig

Ludwig Schneider

A method of manufacturing a power module comprising two substrates is provided, wherein the method comprises disposing a compensation layer of a first thickness above a first substrate; disposing a second substrate above the compensation layer; and reducing the thickness of the compensation layer from the first thickness to a second thickness after the second substrate is disposed on the compensation layer.

Power module comprising two substrates and method of manufacturing the same

According to an exemplary aspect an electronic module is provided, wherein the electronic module comprises an electronic chip comprising at least one electronic component, a spacing element comprising a main surface arranged on the electronic chip and being in thermally conductive connection with the at least one electronic component, and a mold compound at least partially enclosing the electronic chip and the spacing element, wherein the spacing element comprises a lateral surface which is in contact to the mould compound and comprises surface structures.

Electronic module and method of manufacturing the same

An electronic module is provided, which comprises a first carrier; an electronic chip comprising at least one electronic component and arranged on the first carrier; a spacing element comprising a surface arranged on the electronic chip and being in thermal conductive connection with the at least one electronic component; a second carrier arranged on the spacing element; and a mold compound enclosing the electronic chip and the spacing element at least partially; wherein the spacing element comprises a material having a CTE value being matched with at least one other CTE.

In various embodiments, a substrate is provided. The substrate may include: a ceramic carrier having a first side and a second side opposite the first side; a first metal layer disposed over the first side of the ceramic carrier; a second metal layer disposed over the second side of the ceramic carrier; and a cooling structure formed into or over the second metal layer.

Substrate, chip arrangement, and method for manufacturing the same

According to an exemplary aspect an electronic module is provided, wherein the electronic module comprises an electronic chip comprising at least one electronic component, a spacing element comprising a main surface arranged on the electronic chip and being in thermally conductive connection with the at least one electronic component, and a mold compound at least partially enclosing the electronic chip and the spacing element, wherein the spacing element comprises a lateral surface which is in contact to the mold compound and comprises surface structures.

According to an exemplary embodiment, a power module is provided which comprises a semiconductor chip, a bonding substrate comprising an electrically conductive sheet and an electric insulator sheet which is directly attached to the electrically conductive sheet and which is thermally coupled to the semiconductor chip, and an array of cooling structures directly attached to the electrically conductive sheet and configured for removing heat from the semiconductor chip when interacting with cooling fluid.

Power module with cooling structure on bonding substrate for cooling an attached semiconductor chip

In one embodiment of the present invention, a semiconductor package includes a substrate having a first major surface and an opposite second major surface. A chip is disposed in the substrate. The chip includes a plurality of contact pads at the first major surface. A first antenna structure is disposed at the first major surface. A reflector is disposed at the second major surface.

Semiconductor packages with integrated antenna and method of forming thereof

A chip package is provided, the chip package including: a chip including at least one contact pad formed on a chip front side; an encapsulation material at least partially surrounding the chip and covering the at least one contact pad; and at least one electrical interconnect formed through the encapsulation material, wherein the at least one electrical interconnect is configured to electrically redirect the at least one contact pad from a chip package first side at the chip front side to at least one solder structure formed over a chip package second side at a chip back side.

Chip package and a method for manufacturing a chip package

A semiconductor module. One embodiment provides at least two semiconductor chips placed on a carrier. The at least two semiconductor chips are then covered with a molding material to form a molded body. The molded body is thinned until the at least two semiconductor chips are exposed. Then, the carrier is removed from the at least two semiconductor chips. The at least two semiconductor chips are singulated.

Semiconductor module

Growing community of inventors

Pentling, Germany

Ottmar Geitner