Communications Satellite Corporation

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Communications Satellite Corporation (comsat)

Otakar A Horna

Edwin A Stennett

Ferial T El-Mokadem

An echo canceller comprising an adaptive finite impulse response filter receiving a receive signal and having its output subtracted from a send signal, a non-linear device for attenuating low level signals of the send signal and a noise injector for injecting noise into the send signal proportional to a dynamically measured background noise in the subtracted output. The non-linear device and the noise injector are disabled when the receive signal is below expected noise level or the send signal is at a high level relative to the receive signal.

Double talk and line noise detector for a echo canceller

An echo canceller with extended frequency range for acoustic echoes comprising an adaptive finite impulse response filter receiving the receive signal below a cross-over frequency and predicting the echo of this signal across the echo path, a subtractor for subtracting the predicted echo form the send signal below the cross-over frequency, and an adder for combining the low frequency output of the adder with the send signal above the cross-over frequency to form the send signal to be transmitted.

Echo canceller with extended frequency range

An echo canceller for a teleconferencing device is herein disclosed in which a first attenuator limits the dynamic range of a composite speech-echo input signal. A second attenuator, having a gain equal to that of the first attenuator, alters the gain of the emulated echo signal produced by an AFIR filter. The gains of both the first attenuator and the second attenuator are controlled by a common automatic gain control device, which alters the gains as a function of both the dynamic range of the input composite signal and a feedback signal from the output of the first attenuator. This matched attenuator construction allows the AFIR filter to operate within its dynamic range while also limiting the range of the input speech/echo signal. The echo canceller may further comprise a third attenuator which is disposed in the adaptive feedback loop of the AFIR filter. The third attenuator has a gain inversely proportional to the gains of both the first attenuator and the second attenuator. This third attenuator eliminates the gain components from the adaptive error signal. A fourth attenuator may also be provided which limits the received echo source signal, such that the echo canceller is not overloaded.

Automatic gain control for echo cancellers and similar adaptive systems

In a digital echo canceller using an impulse response filter, an interpolating and synchronizing circuit is used to couple the received digital signals from the four-wire circuit to the input of the filter. The interpolation and synchronization circuit generates signals having values between the values of received digital samples, and these interpolated valves are then sampled at the send signal rate and supplied to the impulse response filter.

Digital bit rate synchronizer for digital echo cancellers and similar

A digital adaptive finite impulse response (AFIR) filter having a large number of coefficients is composed of two or more separate filter units. The first filter unit computes response samples h.sub.o -H.sub.n+1 in response to input signal samples to provide a partial estimated response during each sampling period. After the signal samples are fully processed by the first unit, they are transferred to a second filter unit which produces response samples h.sub.n+2 -h.sub.p+1 in response thereto to provide a second partial response. The sum of the two partial responses is computed to provide the total estimated system response. The two independent filter units thus act simultaneously to provide twice as many coefficients as prior art AFIR filters in the same amount of time.

Digital adaptive finite impulse response filter with large number of

Three double talk detectors (DTD) are used in combination with an echo canceller having an adaptive filter and a center clipper. First and second double talk detectors are used in the presence of double talk to selectively freeze the adaptive filter correction loop and to disable the center clipper. The third double talk detector is used to detect the initial adaptive period of the echo canceller. Control of the adaptive filter and clipper is effectively transferred from the first to the second double talk detector upon termination of the initial adaptive period as determined by the third double talk detector. The third double talk detector also detects a false double talk condition (where the distant talker pauses in speech) and overrides the second double talk detector in order to maintain the clipper in an active state.

Double talk detector for echo cancellers

A self adaptive filter effects a distribution of the power density spectrum of two signals which are correlated in the filter adaptation process so that the filter can provide optimum adaption for a wide range of input signals. The power density distribution is provided by multiplying the operands of the correlator by a random sequence of binary numbers before applying the operands to the correlator. The multiplication effects a decorrelation of the operand input signals.

Correction processor of self-adaptive filters

An improved analog to digital converter of the parallel or series-parallel type having expanded range for a given number of comparators in the quantizer. The converter is particularly adapted to convert analog signals, such as television signals, of a type in which a large percentage of the time the analog signal falls within only a portion of the predetermined full range. The quantizer is capable of converting only signals within the portion of the full range. Switching circuitry having a hysteresis characteristic shifts the effective range of the quantizer to additional overlapping ranges to permit conversion of signals outside the portion of the predetermined range.

Analog to digital converter

Improvements in a digital echo canceller utilizing pseudo-logarithmic coding are disclosed which reduce the complexity and cost while improving the performance of the echo canceller. Specifically, there is disclosed an improved analog to pseudo-logarithmic converter, a first and a second embodiment of an improved pseudo-rms to dc converter, an improved .phi.(x) function generator, and an improved error detector.

Analog to digital signal of logarithmic format converter and analog to

A logarithmic echo canceller is disclosed which simplifies the hardware of the canceller by (a) using a logarithmic format for both the sampled voice signal x.sub.i and the coefficient h.sub.i, (b) using sophisticated algorithms for performing the different computational tasks, and (c) using analog techniques for echo subtraction and error signal generation. The incoming signal is sampled in a sample and hold circuit. The sign of the sampled input signal is sensed and its absolute value is converted directly in a special analog-to-digital converter into an A-law companding code. The whole digitized sample x.sub.i is multiplexed and stored in a plurality of shift registers. An average or pseudo rms value of the samples is computed, and the samples are compared in a comparator with the stored average or pseudo rms value, and if the sample is greater than the average or pseudo rms value, a signal enables updating of the existing value of h.sub.i stored in the H-register. The average or pseudo rms value of the incoming signal is also converted in a digital-to-analog converter to a reference voltage used to bias an analog center clipper and the error detector or comparator. A bandpass filter, pre-emphasis circuit and a low pass filter with de-emphasis circuit reduce the harmonic distortion caused by the center clipper. The sample x.sub.i and h.sub.i stored in the X-register and H-register are fed into a multiplier. In order that the A-law encoded x.sub.i and h.sub.i values may be used directly without further A-law/logarithmic conversion, the multiplication is performed in three different ways. In the case when both exponents are non-zero, addition of exponents and mantissas in two adders takes place. When both exponents are zero, the mantissas are directly multiplied. When one of the exponents is non-zero and the other is zero, both mantissas are directly multiplied in a multiplier, and the result is shifted in a shift register according to the value of the exponent. The result of the multiplication is then added to or subtracted from the contents of an accumulator. The output of the accumulator is converted in a digital-to-analog converter into an analog voltage which is subtracted in a differential amplifier from the echo signal which is present in the send out branch of the two-wire to four-wire hybrid.

Logarithmic echo canceller

A sinewave clock distribution network and a clock driver for use in the network permit simplified distribution and synchronization in very high speed logic and digital transmission systems. The sinewave central clock is connected through a branching network to a plurality of clock drivers located in the vicinity of digital circuits to which clock pulses are to be supplied. Each clock driver includes a receiver amplifier which is AC coupled to the clock line. The output of the receiver amplifier is connected to a phase shift RC network which includes an adjustable capacitance. By adjusting the capacitance in the RC network, the timing or delay of the clock signal can be varied to permit synchronization of the clock signals at various points in the distribution network. The phase delayed signal from the RC network is coupled to a limiter which limits the input sinewave to form a squarewave for use by the digital circuits.

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Bethesda, MD, United States of America

Otakar A Horna