Semiconductor Components Industries, LLC

Fairchild Semiconductor Corporation

Oseob Jeon

Seungwon Im

Chung-Lin Wu

Joonseo Son

Daniel Marvin Kinzer

Mankyo Jong

Byoungok Lee

Rajeev Dinkar Joshi

Jerome Teysseyre

Maria Cristina B Estacio

Keunhyuk Lee

Bigildis Dosdos

Venkat Iyer

Olaf Zschieschang

Dukyong Lee

Changyoung Park

Boon Huan Gooi

Dongwook Kang

Byoung-Ok Lee

Yoonsoo Lee

Yoonhwa Choi

Michael John Seddon

Steven Paul Sapp

Maria Cristina Estacio

Ahmad Ashrafzadeh

Inpil Yoo

Eddy Tjhia

Justin N Chiang

David Chong

Lay Yeap Lim

Vijay Ullal

Jeungdae Kim

Youngsun Ko

Changsun Yun

Michael M Dube

Tan Teik Keng

Shibaek Nam

Jihwan Kim

Joon-seo Son

JooYang Eom

Roveendra Paul

Bigidis Dosdos

ByoungOk Lee

In a general aspect, an electronic device assembly includes a substrate arranged in a plane. The substrate has a first side and a second side, the second side being opposite the first side. The assembly also includes a plurality of semiconductor die disposed on the first side of the substrate and at least one signal pin. The at least one signal pin includes a proximal end portion coupled with the first side of the substrate, a distal end portion, and a medial portion disposed between the proximal end portion and the distal end portion. The medial portion is pre-molded in a molding compound, the proximal end portion and the distal end portion exclude the molding compound. The at least one signal pin is arranged along a longitudinal axis that is orthogonal to the plane of the substrate.

Transfer molded power modules and methods of manufacture

In general aspect, a module can include a substrate having a semiconductor circuit implemented thereon, and a negative power supply terminal electrically coupled with the semiconductor circuit via the substrate. The negative power supply terminal includes a connection tab arranged in a first plane. The module also includes a first positive power supply terminal electrically and a second positive power supply terminal that are coupled with the semiconductor circuit via the substrate. The first positive power supply terminal being laterally disposed from the negative power supply terminal, and including a connection tab arranged in the first plane. The second positive power supply terminal is laterally disposed from the negative power supply terminal and arranged in the first plane, such that the negative power supply terminal is disposed between the first positive power supply terminal and the second positive power supply terminal.

Semiconductor device modules

A jet impingement cooling assembly for semiconductor devices may include a heat exchange base having an inlet chamber and an outlet chamber, an inlet connection in fluid connection with the inlet chamber, and an outlet connection in fluid connection with the outlet chamber. A plurality of jet nozzles may be attached to a semiconductor module, with the plurality of jet nozzles including corresponding openings positioned to cause jet impingement of fluid flow from the inlet chamber onto the semiconductor module and then into the outlet chamber.

Jet impingement heatsink for high power semiconductor devices

In a general aspect, an electronic device assembly can include a semiconductor device assembly including a ceramic substrate; a patterned metal layer disposed on a first surface of the ceramic substrate; and a semiconductor die disposed on the patterned metal layer. The electronic device assembly can also include a thermal dissipation appliance. Ceramic material of a second surface of the ceramic substrate can be direct-bonded to a surface of the thermal dissipation appliance. The second surface of the ceramic substrate can be opposite the first surface of the ceramic substrate.

Integration of semiconductor device assemblies with thermal dissipation mechanisms

In general aspect, a semiconductor device package can include a substrate and a semiconductor die disposed on and coupled with the substrate. The semiconductor device package can further include a leadframe having an indentation defined therein, at least a portion of the indentation being disposed on and coupled with the semiconductor die via a conductive adhesive.

Semiconductor device package assemblies with direct leadframe attachment

In a general aspect, a semiconductor device assembly includes a direct-bonded-metal (DBM) substrate having a ceramic layer, and a first metal layer having a uniform thickness that is disposed on a first surface of the DBM substrate. The assembly further includes a second metal layer disposed on a second surface of the DBM substrate opposite the first surface. The second metal layer includes a first portion having a first thickness, and a second portion having a second thickness, the second thickness being greater than the first thickness. The second portion of the second metal layer includes a metal alloy having a coefficient of thermal expansion (CTE) in a range of 7 to 11 parts-per-million per degrees Celsius (ppm/° C.). The assembly also includes a semiconductor die having a first surface coupled with the second portion of the second metal layer.

Thermal mismatch reduction in semiconductor device modules

Implementations of a semiconductor package may include one or more power semiconductor die included in a die module; a first heat sink directly coupled to one or more source pads of the die module; a second heat sink directly coupled to one or more drain pads of the die module; a gate contact coupled with one or more gate pads of the die module; and a coating coupled directly to the die module. The gate contact may be configured to extend through an immersion cooling enclosure.

Dual side direct cooling semiconductor package

A method includes disposing a first direct bonded metal (DBM) substrate substantially parallel to a second DBM substrate a distance apart to enclose a space. The method further includes disposing at least a semiconductor die in the space, and bonding the semiconductor die to the first DBM substrate using a first adhesive layer without an intervening spacer block between the semiconductor die and the first DBM substrate, and bonding the semiconductor die to the second DBM substrate using a second adhesive without an intervening spacer block between the semiconductor die and the second DBM substrate.

High power module package structures

Implementations of a semiconductor package may include one or more semiconductor die directly coupled to only a direct leadframe attach (DLA) leadframe including two or more leads; and a coating covering the one or more semiconductor die and the DLA leadframe where when the semiconductor package is coupled into an immersion cooling enclosure, the coating may be in contact with a dielectric coolant while the two or more leads extend out of the immersion cooling enclosure.

Immersion direct cooling modules

Implementations of semiconductor packages may include: a first substrate having a first dielectric layer coupled between a first metal layer and a second metal layer; a second substrate having a second dielectric layer coupled between a third metal layer and a fourth metal layer. A first die may be coupled with a first electrical spacer coupled in a space between and coupled with the first substrate and the second substrate and a second die may be coupled with a second electrical spacer coupled in a space between and coupled with the first substrate and the second substrate.

Semiconductor package and related methods

Implementations of semiconductor packages may include a first substrate coupled to a first die, a second substrate coupled to a second die, and a spacer included within a perimeter of the first substrate and within a perimeter of a second substrate, the spacer coupled between the first die and the second die, the spacer include a junction cooling pipe therethrough.

Integrated circuit direct cooling systems having substrates in contact with a cooling medium

A method can include coupling a semiconductor chip and an electrode with a substrate. Bottom and top mold die can be use, where the top mold die define a first space and a second space that is separated from the first space. The method can include injecting encapsulation material to form an encapsulation member coupled to and covering at least a portion of the substrate. The encapsulation member can include a housing unit housing the electrode. The electrode can have a conductive sidewall exposed to, and not in contact with the encapsulation member, such that there is open space between the conductive sidewall of the electrode and the encapsulation member from an uppermost surface to a bottommost surface of the encapsulation member, the substrate can having a portion exposed within the open space, and the encapsulation member can have an open cross-section perpendicular to an upper surface of the substrate.

Power module package and method of manufacturing the same

In one general aspect, a semiconductor device package can include a die attach paddle having a first surface and a second surface that is opposite the first surface. The package can also include a semiconductor die coupled with the first surface of the die attach paddle. The package can further include a direct-bonded-metal (DBM) substrate. The DBM substrate can include a ceramic layer having a first surface and a second surface that is opposite the first surface; a first metal layer disposed on the first surface of the ceramic layer and coupled with the second surface of the die attach paddle; and a second metal layer disposed on the second surface of the ceramic layer. The second metal layer can be exposed external to the semiconductor device package. The second metal layer can be electrically isolated from the first metal layer by the ceramic layer.

Semiconductor device package assemblies and methods of manufacture

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Seoul, South Korea

Oseob Jeon