Siliconsystems, Inc.

Oscar Agazzi

Steve Levy

Dave Hedberg

Chris Cole

The jitter tracker of the present invention uses a decision-directed error signal as an input to a feedback loop. The error signal is filtered and coupled to a phase locked loop centered at the center of the jitter tracking frequency range, which in the preferred embodiment is 55 Hz. The frequency width and center track and lock frequencies are set by a loop filter. A second order loop is used to acquire the frequency and phase jitter within an acceptable range. Once within this range, a first order loop is used to lock the amplitude to the input signal. The amplitude and phase values are subtracted from the incoming signal so that a new error may be calculated. In the preferred embodiment, the jitter tracker of the present invention is implemented in a digital signal processor. The jitter tracker of the preferred embodiment of the present invention comprises two filter loops. The first loop is used to generate the magnitude of the jitter error. The second loop generates the phase of the jitter error. The input to the jitter tracker is the quadrature portion of a normalized error term. This quadrature portion is multiplied by the cosine of the output of the error loops to generate the magnitude of the error signal. This term is multiplied by a scaling factor and is then integrated to generate a magnitude error term. The quadrature portion of the normalized error signal is multiplied in the second loop by the sine of the loop output. This phase error signal is coupled to a first order filter within a range in the preferred embodiment of plus or minus 10 Hz from a 55 Hz nominal frequency. The output of this first filter is multiplied by nominal 55 Hz vector and integrated to produce a phase error output. The real portion of this phase error signal is generated and combined with the magnitude error to produce a jitter correction factor for use in the receive channel circuitry.

Phase jitter tracker

The present invention employs a four sample per baud timing recovery scheme to achieve fast acquistion of initial timing phase uncertainity and reliable fast tracking with low jitter for non-equalized QAM wave forms. The present invention operates for data timing frequency uncertainties up to 0.02 percent in the preferred embodiment. The timing recovery system is implemented with programmable digital signal processor code in connection with a programmable phase baud timer. The baud timer may be implemented in software or hardware. The present scheme is based on a pair of quadrature (T/4 spaced) timing error signals derived by a wave difference method. In the wave difference method, the envelope power of each baud sample is computed by square summing the real and imaginary samples of the received analog signal.

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Scotch Plains, NJ, United States of America

Oscar Agazzi