Texas Instruments Corporation

Osaomi Enomoto

Yoichi Miyai

Katsuo Komatsuzaki

Yoshihiro Ogata

Yasuhiro Okumoto

Takashi Iwakiri

Kiyomi Hirose

Hiroto Shinozuka

Yoshinobu Yoneoka

A manufacturing method for a dynamic RAM containing a screen-type structure cylindrical stack cell capacitor. An SiO.sub.2 layer 22 is formed on a polysilicon layer 11 (or a semiconductor substrate 1) to serve as a preform or spacer. A nitride layer 31 is stacked on this SiO.sub.2 layer, and nitride layer 31 and SiO.sub.2 layer 22 are worked into virtually the same pattern. Then the outside surface of SiO.sub.2 layer 22 is etched using nitride layer 31 as a mask, causing the nitride layer 31 to form a lateral projection structure 31A in the region removed by the etching. A polysilicon layer 23 is adhered to the top of silicon layer 11, which serves as a capacitor lower electrode, from the top of nitride layer 31 and SiO.sub.2 layer 22, including this projected portion. Polysilicon layer 23 is etched to leave a portion of polysilicon layer 23 on the outside surface of SiO.sub.2 layer 22 directly beneath the projecting portion 31A of nitride layer 31.

Method of making a cylindrical electrode

A process is disclosed herein for increasing yield in a semiconductor circuity having redundant circuitry for replacing defective normal circuitry in the semiconductor integrated circuit. In the first step, an insufficient sinter operation (50) is carried out in a hydrogen atmosphere at a temperature of less than 350.degree. C. At this temperature, no significant change will be seen in the interface trap density. Thereafter, the integrated circuit is tested (54,56) and the defective normal circuitry then is replaced (58) with the redundant circuitry. The integrated circuit is then subjected to a sufficient sinter operation (64) which is an operation wherein the substrate is disposed at a temperature between 350.degree. C.-500.degree. C. for more than 30 minutes. This sufficient sinter operation is performed in a hydrogen atmosphere, allowing dangling bonds at the interface to be terminated with hydrogen. Preferable, the optimal temperature for the sufficient sinter is approximately 400.degree. C. The integrated circuit is then subjected to a reliability and burn-in procedure.

Two-step sinter method utilized in conjunction with memory cell

A semiconductor device fabrication process comprising the following sequential steps:

Semiconductor device fabrication process

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Ibaraki, Japan

Osaomi Enomoto