Hitachi, Ltd.

Other

Hitachi Ulsi Engineering Corp.

Hitachi Vlsi Engineering Corp.

Renesas Technology Corp.

Renesas Electronics Corporation

Usli Engineering Corp.

Osamu Tsuchiya

Hitoshi Miwa

Shooji Kubono

Tatsuya Ishii

Isamu Asano

Fumio Ootsuka

Hideo Aoki

Yoshinao Kawasaki

Tsuyoshi Tamaru

Masakazu Sagawa

Nobuo Owada

Toru Kaga

Kazuyoshi Torii

Hiromichi Enami

Mitsuaki Horiuchi

Jun Sugiura

Osamu Kasahara

Hidetsugu Ogishi

Makoto Ogasawara

Keisuke Funatsu

Masatoshi Tsuneoka

Takayoshi Kogano

Seiichirou Shirai

Atsushi Wakahara

Hiroyuki Akimori

Sinichi Suzuki

Nobuhiro Otsuka

Yoshihiro Ikeda

Tomotsugu Shimmyo

Tunehiko Tubone

Ken Tsugane

Toshihiro Tanaka

Norio Suzuki

Toshiaki Yamanaka

Natsuki Yokoyama

Masataka Kato

Shinichiro Kimura

Akio Nishida

Katsuyuki Sato

Toshiaki Nishimoto

Kikuo Kusukawa

Atsushi Ogishima

Shinji Shimizu

Kazuhiko Kajigaya

Masakazu Aoki

Kazuyoshi Oshima

Katsuhiro Shimohigashi

Hiromasa Noda

Yoshitaka Tadaki

Yoshifumi Kawamoto

Kozo Watanabe

Hidetoshi Iwai

Atsushi Hiraiwa

Toshihiro Sekiguchi

Jun Murata

Youji Idei

Takashi Nishida

Kiyonori Ohyu

Makoto Saeki

Naokatsu Suwanai

Tetsuya Ishii

A nonvolatile semiconductor memory recovers variation in the threshold of a memory cell due to disturbance related to a word line. The nonvolatile memory continuously performs many writing operations without carrying out single-sector erasing after each writing operation, performing the additional writing operations quicker than the usual writing operation, and lightening the burden imposed on software for use in additional writing. The data stored in a designated sector is read out before being saved in a register, and the selected sector is subjected to single-sector erasing when a predetermined command is given. Then write expected value data is formed from the saved data and data to be additionally written, completing the writing operation.

Nonvolatile memory system, semiconductor memory and writing method

Nonvolatile memory system, semiconductor memory, and writing method

Herein disclosed is a semiconductor integrated circuit device fabricating process for forming MISFETs over the principal surface in those active regions of a substrate, which are surrounded by inactive regions formed of an element separating insulating film and channel stopper regions, comprising: the step of for forming a first mask by a non-oxidizable mask and an etching mask sequentially over the principal surface of the active regions of the substrate; the step of forming a second mask on and in self-alignment with the side walls of the first mask by a non-oxidizable mask thinner than the non-oxidizable mask of the first mask and an etching mask respectively; the step of etching the principal surface of the inactive regions of the substrate by using the first mask and the second mask; the step of forming the element separating insulating film over the principal surface of the inactive regions of the substrate by an oxidization using the first mask and the second mask; and the step of forming the channel stopper regions over the principal surface portions below the element separating insulating film of the substrate by introducing an impurity into all the surface portions including the active regions and the inactive regions of the substrate after the first mask and the second mask have been removed.

Semiconductor integrated circuit device, process for fabricating the same, and apparatus for fabricating the same

SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE HAVING A FIRST WIRING STRIP EXPOSED THROUGH A CONNECTING HOLE, A TRANSITION-METAL FILM IN THE CONNECTING HOLE AND AN ALUMINUM WIRING STRIP THEREOVER, AND A TRANSITION-METAL NITRIDE FILM BETWEEN THE ALUMINUM WIRING STRIP AND THE TRANSITION-METAL FILM

In a method of manufacturing a semiconductor device having a memory mat portion in which an active region and a field region are formed densely, after a polishing stopper film is deposited on a semiconductor substrate, there are formed grooves by etching a polishing stopper film of a field region and the semiconductor substrate. Then, after an insulating film is deposited so as to fill the grooves, then insulating film is partly removed from the memory mat portion by etching. Under this state, the insulating film is chemically mechanically polished until the polishing stopper film is exposed. The film thickness of the polishing stopper film on the active region can be reduced, and an electrical element isolation characteristic of the field region can be improved. At the same time, upon chemical mechanical polishing, a silicon substrate can be prevented from being exposed at the central portion of the memory mat portion and the insulating film can be prevented from being left on the silicon nitride film near the outer periphery, thereby making it possible to form elements having uniform electrical characteristics on all active regions of the memory mat portion.

Method of manufacturing semiconductor devices

A nonvolatile semiconductor memory device is provided which includes a plurality of memory cells each having a floating gate, wherein a threshold level of each memory cell depends on a value of electric charge in said floating gate of said memory cell, and wherein said threshold level of each memory cell is placed at one of a first area and a second area. A controller is also provided which controls to set each threshold voltage of selected ones of said plurality of memory cells, wherein said controller performs a first setting operation and a verifying operation. The first setting operation shifts threshold voltages of the selected ones of said plurality of memory cells in a direction from said first area to said second area. The verifying operation detects erratic memory cells which have threshold voltages which are on a side of said second area which is opposite of a middle area formed between the first area and the second area.

Semiconductor nonvolatile memory apparatus and computer system using the same

Growing community of inventors

Hamura, Japan

Osamu Tsuchiya