Kabushiki Kaisha Toshiba

Osamu Hidaka

Hiroyuki Kanaya

Iwao Kunishima

Hiroshi Mochizuki

Kumi Okuwada

Susumu Shuto

Hiroyuki Takenaka

Norihisa Arai

Yoshinori Kumura

Tomio Katata

Toyota Morimoto

Tsuyoshi Iwamoto

Sumito Ootsuki

A semiconductor memory device includes a memory cell portion, the memory cell portion including a ferroelectric capacitor and a memory cell transistor, the ferroelectric capacitor including a first electrode film on a semiconductor substrate, a second electrode film over the first electrode film, and a ferroelectric film between the first and second electrode films, and the memory cell transistor including a source and a drain between the first and second electrode films, wherein either the source or the drain connects to the first electrode film, and the other of the source or the drain connects to the second electrode film.

Semiconductor memory device including a source and a drain of a memory cell transistor formed between electrodes and a method of fabrication the same

A semiconductor memory device includes a semiconductor substrate having a first region and a second region, a transistor placed in the first region of the semiconductor substrate, a first insulating film formed on the semiconductor substrate in the first and second regions and on the transistor, a first ferroelectric capacitor formed on the first insulating film in the first region and electrically connected to the transistor, a hydrogen barrier film formed above the first ferroelectric capacitor and above the first insulating film in the first and second regions, a first contact penetrating the hydrogen barrier film in the first region and electrically connected to the first ferroelectric capacitor, and a second contact which penetrates the hydrogen barrier film in the second region and which is in a floating state.

Semiconductor memory device and method of manufacturing the same

A semiconductor device having a semiconductor substrate; an insulating film formed on said semiconductor substrate; a ferroelectric capacitor having a lower electrode, a ferroelectric film and an upper electrode which are stacked sequentially on the insulating film; a first hydrogen barrier film; a first inter-layer insulating film covering said ferroelectric capacitor; and a second inter-layer insulating film stacked on the first inter-layer insulating film, the first hydrogen barrier film being interposed between the first and second interlayer insulating films is proposed.

Semicondutor device having ferroelectric capacitor and hydrogen barrier film and manufacturing method thereof

A semiconductor integrated circuit has a ferroelectric capacitor. The ferroelectric capacitor includes a first insulation film formed above a semiconductor substrate, a first electrode which is buried in a fist hole formed in the first insulation film and whose surface is flattened, a second insulation film formed above the first insulation film and having a second hole above the first electrode, a ferroelectric film formed in the second hole, and a second electrode formed in the second hole and above the ferroelectric film and flattened so as to be flush with a surface of the second insulation film.

Semiconductor integrated circuit and method for manufacturing the same

The semiconductor device is constituted in such a manner that a switching transistor having a drain region and a source region which are comprised of an impurity-diffused region is formed in the surface layer portion of a semiconductor substrate. On the semiconductor substrate containing the transistor, a first insulation film is formed, and, at the upper layer side of the first insulation film, a capacitor is formed. The capacitor is comprised of a lower electrode, an inter-electrode insulation film comprising one of ferroelectric and high-permittivity dielectric, and an upper electrode. Before the inter-electrode insulation film is formed, a second insulation film is formed so as to cover the side face portion of the inter-electrode insulation film, the second insulation film protecting the side face portion of the inter-electrode insulation film. One of the drain region and the source region and one of the upper electrode and the lower electrode of the capacitor are connected to each other by an electrode wiring. A wiring connected to the other one of the drain region and the source region is formed on the semiconductor substrate.

Semiconductor device and method for the manufacture thereof

Semiconductor device having ferroelectric capacitor and hydrogen barrier film and manufacturing method thereof

The semiconductor device is constituted in such a manner that a switching transistor having a drain region and a source region which are comprised of an impurity-diffused region is formed in the surface layer portion of a semiconductor substrate. On the semiconductor substrate containing the transistor, a first insulation film is formed, and, at the upper layer side of the first insulation film, a capacitor is formed. The capacitor is comprised of a lower electrode, an inter-electrode insulation film comprising one of ferroelectric and high-permittivity dielectric, and an upper electrode. Before the inter-electrode insulation film is formed, a second insulation film is formed so as to cover the side face portion of the inter-electrode insulation film, the second insulation film protecting the side face portion of the inter-electrode insulation film. One of the drain region and the source region and one of the upper electrode and the lower electrode of the capacitor are connected to each other by an electrode wiring. A wiring connected to the other one of the drain region and the source region is formed on the semiconductor. substrate.

A semiconductor integrated circuit has a ferroelectric capacitor. The ferroelectric capacitor includes a first insulation film formed above a semiconductor substrate, a first electrode which is buried in a first hole formed in the first insulation film and whose surface is flattened, a second insulation film formed above the first insulation film and having a second hole above the first electrode, a ferroelectric film formed in the second hole, and a second electrode formed in the second hole and above the ferroelectric film and flattened so as to be flush with a surface of the second insulation film.

A method of manufacturing a semiconductor apparatus comprises the steps of forming, on a surface of a semiconductor substrate, an MIS transistor including a drain region and a source region each formed of an impurity diffusion region, forming an insulation film on the semiconductor substrate after the MIS transistor has been formed, selectively forming contact holes in the insulation film, embedding, into the contact hole, a capacitor contact plug having a lower end which is in contact with one of the drain region and the source region of the MIS transistor, forming a ferroelectric capacitor having a lower electrode, a ferroelectric film and an upper electrode on the insulation film after the capacitor contact plug has been formed, and forming an electric wire for establishing a connection between the upper electrode of the ferroelectric capacitor and an upper surface of the capacitor contact plug.

Growing community of inventors

Tokyo, Japan

Osamu Hidaka