Fujitsu Quantum Devices Limited

Eudyna Devices Inc.

Osamu Baba

Yutaka Mimino

Yoshio Aoki

Muneharu Gotoh

Tsuneo Tokumitsu

An electronic circuit device includes a negative resistance generating circuit, a second transistor and a path. The negative resistance generating circuit has a first transistor having a control terminal coupled to a resonator. The second transistor has a control terminal coupled to an output terminal of the first transistor and has an output terminal coupled to a DC bias terminal. The path is coupled to between the DC bias terminal and an output terminal of the first transistor through the second transistor and provides a bias to the first transistor.

Electronic oscillator circuit device

A high-frequency semiconductor device for power amplification has a comb-teeth electrode on each of active regions formed on the front surface of the semiconductor substrate. One aspect of the present invention, there is provided a monolithic microwave integrated circuit (MMIC) having a plurality of rectangular-shaped active regions arranged side by side on the front surface of the semiconductor substrate, each of the active regions having interdigited gate, drain and source electrodes thereon which are connected to the respective pads by multilayer interconnection technique. Additionally, the source potential is fed from the back surface of the substrate through a metal plugged via-hole.

Semiconductor device having divided active regions with comb-teeth electrodes thereon

A high frequency semiconductor device including wiring layers which are formed above a semiconductor substrate and in which transmission lines are formed by combining with a ground plate having a potential fixed at the ground potential, at least one crossing portion in which the wiring layers mutually cross, with insulating interlayers provided therebetween, and at least one separation electrode being selectively provided on one of the insulating interlayers, the at least one separation electrode having a potential fixed at the ground potential. Accordingly, in the high frequency semiconductor device, electrical interference between two crossing wiring layer is prevented and transmission loss is suppressed.

High frequency semiconductor device

A structure for eliminating the influence of an antenna line connected to the patch electrode on the antenna characteristics of a patch antenna built in an MMIC is disclosed. A through-hole is formed in the antenna ground plane which is provided under the patch electrode with an interlayer insulation film therebetween, the antena line is provided in the side opposite to the patch electrode with respect to the antena ground plane, and the patch electrode and antenna line are connected to each other with a conductor passing through the trough-hole.

High-frequency semiconductor device

A structure for preventing MMICs (Monolithic Microwave Integrated Circuits) from deterioration in the high-frequency transmission characteristics thereof, which results from mechanical pressure applied to the pads during the wire-bonding thereto for external connection. The structure includes a groove provided in the surface of the interlayer insulation film around each of the pads. The line conductor for transmitting high-frequency signals is free from the peeling off or bending thereof, which is caused by the deformation in the interlayer insulation films during when the mechanical pressure applied to the pads, and thus, the change in the transmission characteristics of the line conductor can be minimized, and the reliability of MMICs can be improved.

A multilayer wiring structure for MMICs includes a power-supply wiring formed of a multilayer wiring (a plurality of power-supply lines). The wires are interconnected by throughholes. A power-supply current is divided and supplied to the lines. A large current can be supplied to the entirety of the multilayer wiring, even when the width of each of the lines is reduced. The multilayer wiring structure has an improved degree of freedom in the layout of wiring.

A high frequency semiconductor device includes a ground plate, an insulating layer, a power-supply conductor, an insulating interlayer, and a strip line as a line conductor. The power-supply conductor is disposed above the ground plate, with the insulating layer provided therebetween. The ground plate and the power-supply conductor have a capacitance formed therebetween. Thus, the line conductor regards the power-supply conductor as having a potential identical to that of the ground plate. This makes it possible to lay out the line conductor without considering the arrangement of the power-supply conductor. In other words, by two-dimensionally overlapping a microstrip line and a power-supply conductor in an MMIC, the degree of freedom in the device layout can be increased.

In a high frequency semiconductor device, a shield plate which is connected to the ground potential is provided above an MMIC structure including line conductors, with an insulating interlayer provided therebetween. By using the shield plate to shield the MMIC, interference caused by external electromagnetic waves or leakage of electromagnetic waves to the exterior can be reduced in a chip alone.

A negative resistance circuit having an output terminal is connected to a first terminal of a strip shaped resonator. Anode of a variable capacitance diode is connected to a second terminal of the strip shaped resonator via a capacitor &prime;. Cathode of the variable capacitance diode is grounded. One terminal of a high impedance strip shaped line is connected to the anode of the variable capacitance diode. Other terminal of the strip shaped line is grounded via a capacitor . The capacitor has sufficiently low impedance at an oscillation frequency.

Microwave voltage-controlled-oscillator

A high frequency semiconductor device includes semiconductor elements provided on a semiconductor substrate, a surface insulating layer for covering the semiconductor elements, at least one wiring layer which is provided above the surface insulating layer, with at least one insulating interlayer provided therebetween, and which combines with the ground potential to form transmission line, and at least one heat-radiating stud which is provided in at least one throughhole so as to penetrate said insulating interlayers and so as not to penetrate said surface insulating layer.

A damping resistance is connected between the drain D of an FET and a first end T of an output transmission line , and a damping resistance is connected between the drain D of an FET and the first end T . The source of the FET and the gate of the FET are connected to a ground plane on the back surface of a substrate through a via which has a parasitic inductance when a multiplied frequency exceeds 20 GHz. The gate of the FET and the source of the FET receive microwaves of the same frequency and phase through an input transmission line

Frequency multiplier without spurious oscillation

A semiconductor integrated circuit has a 3-dimmensional interconnection line structure for high-speed operation. One aspect of the present invention, there is provided a monolithic microwave integrated circuit (MMIC) having a 3-dimmensional tournament tree shaped multilayer interconnection lines, wherein a single electric feeding point on a top surface of the MMIC is divided, layer by layer, into plural electrodes on the semiconductor substrate of the MMIC via a plurality of laminated interconnection layers and vertical interconnection layers therebetween shaped like a tournament tree.

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Yamanashi, Japan

Osamu Baba