USA As Represented by Secretary of the Navy

Osama M Nayfeh

Kenneth S Simonsen

Anna Leese De Escobar

Son Dinh

David Kurt Gaskill

Patrick Craig Sims

Brian A Higa

Tom Reinecke

Charles Newton

Shahrokh Naderi

Brad Liu

Sam Carter

A method useful for network and spectrum defense which operates to analyze cyber data and spectra while performing real time optimization which is based on the analyzed cyber data or spectrum. The method utilizes quantum computing and reconfigurable qubits with built-in memory to sample a target cyber data or spectrum, search through the sample and determine a desired or required network or spectrum reallocation, and determine optimal values for its order parameters and Hamiltonian and tune the qubits in accordance with the determination. An embodiment may provide for spectrum optimization that minimizes frequency bandwidth, power, and bit error rate. The desired or required network or spectrum reallocation and optimal values order parameters and Hamiltonian may be stored in the built-in memory to facilitate machine learning.

Quantum computer based method for analyzing cyber data and spectra while performing optimization based on the analysis

A method includes depositing a layer of silicon oxide onto a layer of silicon carbide; ion implanting the layer of silicon carbide, annealing the ion implanted layer of silicon carbide to produce defects within the layer of silicon carbide, performing photolithography using a mask layer on regions of the layer of silicon carbide to define regions for electrode deposition, removing the layer of silicon oxide from the layer of silicon carbide in the one or more regions for electrode deposition, forming one or more electrodes by depositing indium tin oxide (ITO) in each of the regions for electrode deposition, performing a first lift-off operation to remove the mask layer surrounding the electrodes, depositing a passivation and gate silicon oxide layer on top of the layer of silicon carbide and the electrodes, and performing a second lift-off operation to fabricate an optically transparent ITO gate between the electrodes.

Formation of field-tunable silicon carbide defect qubits with optically transparent electrodes and silicon oxide surface passivation

A device includes a converter configured to convert photons input from a photonic link into Cooper-pairs, a first superconductor, a second superconductor, a plurality of nanowires connected to the first superconductor and the second superconductor, and a gate array connected to the plurality of nanowires and configured to alter quantum states of ions within the plurality of nanowires.

Quantum computing with photonic/ionic tuning of entanglement

A tunable quantum qubit circuit comprising: a plurality of interconnected Josephson tunneling junctions sculpted in-situ on-chip, wherein each Josephson tunneling junction comprises a pair of high temperature superconductors separated by an active region having a controlled charge density; a capacitive-coupled control gate operatively coupled to the Josephson tunneling junctions and configured to simultaneously modulate energy levels of the Josephson tunneling junctions; and independent control gates operatively coupled to the Josephson tunneling junctions, wherein the independent control gates are reconfigurable on-the-fly by an operator.

Reconfigurable, tunable quantum qubit circuits with internal, nonvolatile memory

A process for constructing a superconducting Josephson-based nonvolatile quantum memory device comprising: sequentially depositing on a silicon substrate a thermal oxide buffer layer, a superconductor bottom-electrode thin film, and an oxide isolation layer; patterning an active window having dimensions smaller that 10 nanometers in the oxide isolation layer; then sequentially depositing a bottom tunnel oxide layer, a charge-trapping layer, a top cap, and a top superconductor electrode layer; defining an active region by dry etching down to the oxide isolation layer while protecting the active region from etch chemistry; depositing a device passivation layer; defining and patterning vias from a top of the device passivation layer to the superconductor bottom-electrode thin film and to the top superconductor electrode of the active region; and depositing metal interconnect into the vias.

Advanced process flow for quantum memory devices and josephson junctions with heterogeneous integration

A system and method involve generating an electric field across a superconductor device having an ionic layer disposed between and separated from first and second superconductor layers by respective first and second barrier layers. The electric field may be generated by applying an input signal, such as a voltage, to the superconductor device while the device is in a superconducting state. The voltage may be below a threshold voltage for inducing ion transport within the ionic layer or may be above or below a threshold voltage for inducing ion transport from the ionic layer across an ionic layer/barrier layer interface. The ion transport may tune the potential profile and/or modulate the critical current of the superconductor device and may include quantum coherent ionic transport, Josephson tunneling, or resonant tunneling. The electric field generated across the superconductor device may alter the spin-states of the ions within the ionic layer.

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San Diego, CA, United States of America

Osama M Nayfeh