Mellanox Technologies, Ltd.

Ortal Ben Moshe

Gil Bloch

Daniel Marcovitch

Richard Leigh Graham

Yossef Itigin

Roman Nudelman

Barak Gafni

Aviv Kfir

A network device includes a first interface, a second interface, and circuitry. The first interface is configured to communicate at least with a memory. The second interface is configured to communicate over a network with a peer network device. The circuitry is configured to receive a request to transfer data over the network between the memory and the peer network device in accordance with (i) a pattern of offsets to be accessed in the memory and (ii) a memory key representing a memory space to be accessed using the pattern, and to transfer the data in accordance with the request.

Patterned memory-network data transfer

A Direct Memory Access (DMA) device includes an interface and a DMA engine. The interface is configured to communicate with a first memory and with a second memory. The DMA engine is configured to (i) receive a request to transfer data between the first memory and the second memory in accordance with a pattern of offsets to be accessed in the first memory or in the second memory, and (ii) transfer the data in accordance with the request.

Patterned direct memory access (DMA)

A network device includes a first interface, a second interface and circuitry. The first interface is configured to communicate at least with a first memory. The second interface is configured to communicate over a network with a peer network device coupled to a second memory. The circuitry is configured to (i) receive a request to transfer data over the network between the first memory and the second memory in accordance with a pattern of offsets to be accessed in the first memory or in the second memory, and (ii) transfer the data in accordance with the request.

Patterned remote direct memory access (RDMA)

A networking device and system are described, among other things. An illustrative system is disclosed to include a packet parser and a state machine that includes a NULL header state. The packet parser references the state machine to enter the NULL header state automatically in response to parsing a packet header of a predetermined type and then, while in the NULL header state, analyzes a subsequent set of bytes without advancing a parser pointer.

Growing community of inventors

Moshav Ein Haemek, Israel

Ortal Ben Moshe