Apple Inc.

Juniper Networks, Inc.

Oren Kerem

Maxim W Smirnov

Elena Lamburn

David R Pope

Rohit Kumar Gupta

John H Kelm

Assaf Menachem

Ido Y Soffair

Liang Deng

Meir Harar

Prabhu Rajamani

Deepak Goel

Jeffrey Glenn Libby

Anurag P Gupta

David James Ofelt

Chihsin Wu

Michael Bekerman

Wayne Eric Burk

Hoi Man S Ng

Embodiments relate to detecting a timeout error on receipt of valid pixel data from an image sensor by a sensor interface circuit. When the valid pixel data is not timely received at the sensor interface circuit, a timeout error signal is generated by the sensor interface circuit. A time limit for determining the timeout error signal may be defined by a global clock that provides a clock signal to the sensor interface circuit and other circuits. As a result, the sensor interface circuit generates a dummy frame and sends out the dummy frame to subsequent circuits so that the timeout error does not bottleneck subsequent processing stages. In contrast, if the valid pixel data is timely received, sensor data received from the image sensor is unpacked into a frame of pixels.

Generation of dummy frame in image sensor interface circuit responsive to detection of timeout error

Throttling circuitry may throttle the backlight reconstruction via backlight reconstruction and compensation circuitry in a display pipeline when power may be limited. This throttling of the display pipeline may limit a number of cycles that may be used for performing backlight reconstruction and compensation.

Backlight reconstruction and compensation-based throttling

A portable electronic device may include an image signal processor that includes a clipping circuit, a pyramid generator circuit, and an image fusion processor. The clipping circuit clips pixel values that are under-exposed or over-exposed. The pyramid generator circuit applies a filter to the pixels of the image to generate a filtered image. Some of the filtered pixels may be generated from one or more clipped pixel values. The pyramid generator circuit identifies those filtered pixels that are generated from one or more clipped pixel values and marks the identified filtered pixels with a tag. The pyramid generator circuit decimates the filtered image to generate a downscaled image, which may include one or more filtered pixels that are marked with the tags. The image fusion processor fuses the downscaled image with another image. The pixels that are marked with the tags may be disregarded in the fusion process.

Tagging clipped pixels for pyramid processing in image signal processor

Embodiments relate to two stage multi-scale processing of an image. A first stage processing circuitry generates an unscaled single color version of the image that undergoes noise reduction before generating a high frequency component of the unscaled single color version. A scaler generates a first downscaled version of the image comprising a plurality of color components. A second stage processing circuitry generates a plurality of sequentially downscaled images based on the first downscaled version. The second stage processing circuitry processes the first downscaled version and the downscaled images to generate a processed version of the first downscaled version. The unscaled single color high frequency component and the processed version of the first downscaled version of the image are merged to generate a processed version of the image.

Two stage multi-scale processing of image data

In general, techniques of the present disclosure relate to synchronizing concurrent access to multiple portions of a data structure. In one example, a method includes, sequentially selecting a plurality of requests from a request queue, wherein at least one of the requests specifies a plurality of requested synchronization objects for corresponding candidate portions of a data structure to which to apply an operation associated with a data element. The method also includes querying one or more sets of identifiers to determine whether one or more of the requested synchronizations objects specified by the selected request are acquirable. The method also includes acquiring each of the requested synchronization objects that are acquirable. The method includes, responsive to acquiring all of the one or more requested synchronization objects, selecting a subset of the candidate portions of the data structure and applying the operation only to the selected subset of the candidate portions.

Acquisition of multiple synchronization objects within a computing device

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Sunnyvale, CA, United States of America

Oren Kerem