Texas Instruments Corporation

Onn Haran

Eric Baissus

Yaron Kaufmann

Haviv Ilan

Yotam Shefi

Oren Barazovesky

Havin Ilan

A method and apparatus for providing multiple queues that share a single memory buffer. A memory buffer is divided into a plurality of fixed length memory segments. Queues are created by chaining one or more memory segments together. Memory segments are allocated on a dynamic basis when needed by a queue. Multiple queues are created wherein each queue consists of a set of one or more memory segments. A list is used to track the memory segments making up a queue. The pointers to the memory segments are stored in a pointer table or a linked list termed a next segment pointer table. Multiple queues are handled by creating multiple linked lists, one for each queue. Each memory segment has associated with it a corresponding next segment pointer. A segment pointer is assigned to each memory segment and is adapted to contain the address of the next segment in the queue. A segment status table comprises bits corresponding to different memory segments that indicate whether a segment is currently available or is occupied as part of a queue. The next segment pointers and status bits are updated dynamically in accordance with read, write, flush and status commands.

Transmit buffer with dynamic size queues

An apparatus for and method of generating a clock signal having a desired frequency that is derived from a clock source having any arbitrary,frequency. The mechanism of the present invention generates an average rate, very close to the optimal rate desired, by 'swallowing' or absorbing clock cycles of the available frequency source. Precise timing is achieved by adding correcting time intervals, which are based on counting pulses from the higher rate clock source. The clock frequency generator comprises a standby mode state machine and a jitter calculation processor. Timing calculations are performed by the jitter calculation processor and the standby mode state machine functions to generate the desired standby mode clock frequency. The state machine utilizes counters to track the number of cycles of the available clock and the number of generated cycles of the standby clock.

Apparatus for and method of generating a clock from an available clock of arbitrary frequency

A GFSK modulator suitable for use in an RF communication system comprising a modular subsystem and a baseband processor subsystem which is implemented digitally. The baseband processor subsystem comprises a Gaussian filter, phase accumulator and cosine and sine look up tables. The baseband processor functions to convert an input data sequence into I and Q output signals. The I and Q signals are subsequently modulated by a quadrature modulator to yield a GFSK modulated signal which can then be amplified and placed into the channel. The response of the Gaussian filter is pre-calculated for all possible combinations of the input data and the results are quantized and stored in a look up table. The quantized phase results (either magnitude or differences), generated in response to the input data, are accumulated digitally and converted to I and Q signals. The modulator may be implemented using three look up tables: two of which are for storing cosine and sine values and the third is used to store the pre-calculated quantized phase results (either absolute magnitudes or differences). The size of the three look up tables may be reduced by taking advantage of the symmetry properties of the Gaussian filter response and the cosine and sine functions.

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Kfa-Saba, Israel

Onn Haran