Commissariat a L'energie Atomique

Commissariat &#xc0; L'&#xc9;nergie Atomique Et Aux &#xc9;nergies Alternatives

Olivier Faynot

Maud Vinet

Laurent Clavelier

Laurent Grenouillet

Romain Wacquez

Cyrille Le Royer

Yannick Le Tiec

Jean-Charles Barbe

Jean-Pierre Joly

The semiconductor-on-insulator substrate includes a support, an electrically insulating film, a crystalline film made from semiconductor material, and a protection layer. Germanium ions are implanted in the semiconductor material film through the protection layer so as to form an amorphized area in contact with the protection layer and a crystalline area in contact with the electrically insulating film. The semiconductor material film is annealed so as to recrystallize the amorphized area from the crystalline area.

Method for producing a field effect transistor with a SiGe channel by ion implantation

The three-dimensional integrated CMOS circuit is formed in a hybrid substrate. n-MOS type transistors are formed, at a bottom level, in a first semi-conducting layer of silicon having a (100) orientation, which layer may be tension strained. p-MOS transistors are formed, at a top level, in a preferably monocrystalline and compression strained second semi-conducting layer of germanium having a (110) orientation. The second semi-conducting layer is transferred onto a first block in which the n-MOS transistors were previously formed, and the p-MOS transistors are then formed.

Three-dimensional integrated C-MOS circuit and method for producing same

The transistor comprises a source and a drain separated by a lightly doped intermediate zone. The intermediate zone forms first and second junctions respectively with the source and with the drain. The transistor comprises a first gate to generate an electric field in the intermediate zone, on the same side as the first junction, and a second gate to generate an electric field in the intermediate zone, on the same side as the second junction.

Transistor of the I-MOS type comprising two independent gates and method of using such a transistor

A method is provided for fabricating a thin layer element, in which a layer of a first material supports a pattern of a second material having a thickness of less than 15 nm, including a step of doping by implanting a chemical species over at least a portion of the layer-pattern assembly to stabilize the pattern on the layer.

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Seyssinet-Pariset, France

Olivier Faynot