Texas Instruments Corporation

Olivier Alain Faynot

Gabriel George Barna

Christoph A Wasshuber

Howard L Tigelaar

A method of manufacturing a single-electron transistor device is provided. The method includes forming a thinned region in a silicon substrate, the thinned region offset by a non-selected region. The method also includes forming at least one quantum island from the thinned region by subjecting the thinned region to an annealing process. The non-selected region is aligned with the quantum island and tunnel junctions are formed between the quantum island and the non-selected region. The present invention also includes a single-electron device, and a method of manufacturing an integrated circuit that includes a single-electron device.

Method to manufacture silicon quantum islands and single-electron devices

A method () of forming fully-depleted () and partially-depleted () silicon-on-insulator (SOI) devices on a single die in an integrated circuit device () is disclosed using SOI starting material () and a selective epitaxial growth process ().

Method of fabricating a combined fully-depleted silicon-on-insulator (FD-SOI) and partially-depleted silicon-on-insulator (PD-SOI) devices

The present invention provides a method of manufacturing a single-electron transistor device (). The method includes forming a thinned region () in a silicon substrate (), the thinned region () offset by a non-selected region (). The method also includes forming at least one quantum island () from the thinned region () by subjecting the thinned region () to an annealing process. The non-selected region () is aligned with the quantum island () and tunnel junctions () are formed between the quantum island () and the non-selected region (). The present invention also includes a single-electron device (), and a method of manufacturing an integrated circuit () that includes a single-electron device ().

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Seyssinet, France

Olivier Alain Faynot