Infineon Technologies Ag

Oliver Humbel

Carsten Schaeffer

Angelika Koprowski

Gerhard Schmidt

Juergen Steinbrenner

Josef-Georg Bauer

Jens Brandenburg

Philipp Sebastian Koch

Hans-Joachim Schulze

Ravi Keshav Joshi

Frank Hille

Holger Schulze

Evelyn Napetschnig

Markus Kahn

Joachim Hirschler

Roman Roth

Frank Umbach

Thomas Laska

Christian Maier

Thomas Rupp

Christoffer Erbert

Michael Fugger

Sirinpa Monayakul

Hans Millonig

Julia Zischang

Francisco Javier Santos Rodriguez

Werner Schustereder

Wolfgang Lehnert

Holger Ruething

Mathias Plappert

Josef Georg Bauer

Mario Barusic

Carsten Schäffer

Erwin Lercher

Matthias Mueller

Matthias Müller

Diana Car

Patrick Hanekamp

Sebastian Kremp

Thomas Kurzmann

A semiconductor device and a method of forming a semiconductor device are provided. In an embodiment, the semiconductor device comprises a device region, an edge termination region surrounding the device region, a first metal feature in the edge termination region, a first conformal ion diffusion barrier layer over the first metal feature, and a first conformal chemical protection layer over the first conformal ion diffusion barrier layer.

Semiconductor device

A method of manufacturing a semiconductor device includes forming a wiring metal layer structure; forming a dielectric layer structure arranged directly on the wiring metal layer structure; and forming a bonding pad metal layer structure arranged, at least partially, directly on the dielectric layer structure, wherein a layer thickness of the dielectric layer structure ranges from 1% to 30% of a layer thickness of the wiring metal layer structure, wherein the wiring metal layer structure and the bonding pad metal structure are electrically connected through openings in the dielectric layer structure.

Semiconductor device including bonding pad metal layer structure

A semiconductor device includes: a semiconductor body having an active region and an edge termination region between the active region and a side surface of the semiconductor body; a first portion including silicon and nitrogen; a second portion including silicon and nitrogen, the second portion being in direct contact with the first portion; and a front side metallization in contact with the semiconductor body in the active region. The first portion separates the second portion from the semiconductor body. An average silicon content in the first portion is higher than in the second portion. The front side metallization is interposed between the first portion and the semiconductor body in the active region but not in the edge termination region, and/or the first portion and the second portion are both present in the edge termination region but not in the active region.

Semiconductor device with first and second portions that include silicon and nitrogen

A semiconductor device is proposed. The semiconductor device includes a wiring metal layer structure. The semiconductor device further includes a dielectric layer structure arranged directly on the wiring metal layer structure. The semiconductor device further includes a bonding pad metal layer structure arranged, at least partly, directly on the dielectric layer structure. A layer thickness of the dielectric layer structure ranges from 1% to 30% of a layer thickness of the wiring metal layer structure. The wiring metal layer structure and the bonding pad metal structure are electrically connected through openings in the dielectric layer structure.

A power semiconductor device having a power semiconductor transistor configuration includes: a semiconductor body having a front side coupled to a first load terminal structure, a backside coupled to a second load terminal structure, and a lateral chip edge; an active region for conducting a load current in a conducting state; and an edge termination region separating the active region and lateral chip edge. At the front-side, the edge termination region includes a protection region devoid of any metallic structure, unless the metallic structure is electrically shielded from below by a polysilicon layer that extends further towards the lateral chip edge than the metallic structure by a lateral distance of at least 20 &#x3bc;m. In a blocking state, the protection region accommodates a voltage change of at least 90% of a blocking voltage inside the semiconductor body in a lateral direction from the active region towards the lateral chip edge.

Ppower semiconductor device with anticorrosive edge termination structure

A semiconductor device includes a semiconductor body and a first portion including silicon and nitrogen. The first portion is in direct contact with the semiconductor body. A second portion including silicon and nitrogen is in direct contact with the first portion. The first portion is between the semiconductor body and the second portion. An average silicon content in the first portion is higher than in the second portion.

Semiconductor device with a portion including silicon and nitrogen and method of manufacturing

According to an embodiment of a semiconductor device, the semiconductor devices includes a metal structure electrically connected to a silicon carbide semiconductor body and a metal adhesion and barrier structure between the metal structure and the silicon carbide semiconductor body. The metal adhesion and barrier structure includes a layer comprising titanium and tungsten.

Silicon carbide semiconductor device having a metal adhesion and barrier structure and a method of forming such a semiconductor device

According to an embodiment of a semiconductor device, the semiconductor devices includes a metal structure electrically connected to a semiconductor body and a metal adhesion and barrier structure between the metal structure and the semiconductor body. The metal adhesion and barrier structure includes a first layer having titanium and tungsten, and a second layer having titanium, tungsten, and nitrogen on the first layer having titanium and tungsten.

Semiconductor device having a metal adhesion and barrier structure and a method of forming such a semiconductor device

A semiconductor device includes a semiconductor body with a first surface, a contact electrode arranged on the first surface, and a passivation layer on the first surface adjacent the contact electrode. The passivation layer includes a layer stack with an amorphous semi-insulating layer on the first surface, a first nitride layer on the amorphous semi-insulating layer, and a second nitride layer on the first nitride layer.

Semiconductor device with a passivation layer

A method includes forming an emitter at the first side of a semiconductor substrate by doping, wherein the dopant concentration is higher in the emitter than in the edge region; growing an oxide layer on the first side by annealing, wherein the oxide layer has a first thickness in a first region covering the emitter, and a second thickness in a second region covering the edge region. The first thickness is larger than the second thickness. Heavy metal ions are implanted through the first side with a first energy, and with a second energy, wherein the first energy and the second energy are different, such that the implanted heavy metal concentration in the edge region is higher than in the emitter due to an absorption of the oxide layer covering the emitter, resulting in a lower charge carrier lifetime in the edge region than in the emitter.

Semiconductor device and method for forming a semiconductor device

A semiconductor device includes a semiconductor substrate having a first side, a second side opposite the first side, an active area, an outer rim, and an edge termination area arranged between the outer rim and the active area. A metallization structure is arranged on the first side of the semiconductor substrate and comprising at least a first metal layer comprised of a first metallic material and a second metal layer comprised of a second metallic material, wherein the first metallic material is electrochemically more stable than the second metallic material. The first metal layer extends laterally further towards the outer rim than the second metal layer.

Semiconductor device having a corrosion-resistant metallization and method for manufacturing thereof

Disclosed are a method and a semiconductor device. The method includes implanting recombination center atoms via a first surface into a semiconductor body, and causing the implanted recombination center atoms to diffuse in the semiconductor body in a first diffusion process.

Adjusting the charge carrier lifetime in a bipolar semiconductor device

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Maria Elend, Austria

Oliver Humbel