Infineon Technologies Ag

Infineon Technologies Austria Ag

Technische Universitaet Graz

Oliver Hellmund

Hans-Joachim Schulze

Johannes Baumgartl

Ingo Muri

Peter Irsigler

Iris Moder

Sebastian Schmidt

Thomas Christian Neidhart

Martina Seider-Schmidt

Anton Mauder

Friedrich Kroener

Jacob Tillmann Ludwig

Francisco Javier Santos Rodriguez

Manfred Engelhardt

Gerhard Schmidt

Carsten Von Koblinski

Barbara Eichinger

Daniel Kraft

Thorsten Meyer

Andreas Peter Meiser

Ralf Siemieniec

Frank Singer

Martin Poelzl

Oliver Blank

Jens Peter Konrath

Manfred Schneegans

Ravi Keshav Joshi

David Laforet

Michael Roesner

Matthias Sperl

Martin Mischitz

Olaf Storbeck

Hanno Melzner

Markus Heinrici

Stefan Miethaner

Knut Stahrenberg

Donald Dibra

Annette Saenger

Brendan Holland

Robert Wiesner

Caterina Travan

Maik Langner

Markus Neuber

Doris Sommer

A method of manufacturing a micro-light-emitting diode display includes processing a wafer to form a plurality of functional chips integral with the wafer. A plurality of wafer tiles is defined in the wafer, wherein each wafer tile is composed of a cluster of functional chips. The wafer tiles are singulated by wafer dicing. A plurality of separate wafer tiles is bonded to a semiconductor wafer by hybrid bonding. The functional chips are singulated together with chips of the semiconductor wafer by dicing the bonded-together wafer tiles and semiconductor wafer.

Method of manufacturing a hybrid device

A semiconductor device includes a semiconductor substrate having a first dopant and a second dopant. A covalent atomic radius of a material of the semiconductor substrate is i) larger than a covalent atomic radius of the first dopant and smaller than a covalent atomic radius of the second dopant, or ii) smaller than the covalent atomic radius of the first dopant and larger than the covalent atomic radius of the second dopant. The semiconductor device further includes a semiconductor layer on the semiconductor substrate and semiconductor device elements in the semiconductor layer. A vertical concentration profile of the first dopant decreases along at least 80% of a distance between an interface of the semiconductor substrate and the semiconductor layer to a surface of the semiconductor substrate opposite to the interface.

Semiconductor device having semiconductor device elements in a semiconductor layer

A semiconductor device includes a semiconductor die, an electrical contact arranged on a surface of the semiconductor die, and a metal layer arranged on the electrical contact, wherein the metal layer includes a singulated part of at least one of a metal foil, a metal sheet, a metal leadframe, or a metal plate. When viewed in a direction perpendicular to the surface of the semiconductor die, a footprint of the electrical contact and a footprint of the metal layer are substantially congruent.

Semiconductor device including an electrical contact with a metal layer arranged thereon

A molding compound and a semiconductor arrangement with a molding compound are disclosed. The molding compound includes a matrix and a filler including filler particles. The filler particles each include a core with an electrically conducting or a semiconducting material and an electrically insulating cover.

Molding compound and semiconductor package with a molding compound

A method of manufacturing a semiconductor device includes providing a semiconductor substrate having opposing first and second main surfaces and first and second dopants. A covalent atomic radius of a material of the substrate is i) larger than a covalent atomic radius of the first dopant and smaller than that of the second dopant, or ii) smaller than the covalent atomic radius of the first dopant and larger than that of the second dopant. A vertical extension of the first dopant into the substrate from the first main surface ends at a bottom of a substrate portion at a first vertical distance to the first main surface. The method further includes forming a semiconductor layer on the first main surface, forming semiconductor device elements in the semiconductor layer, and reducing a thickness of the substrate by removing material from the second main surface at least up to the substrate portion.

Semiconductor device and manufacturing method

A semiconductor device includes a first epitaxial layer, a second epitaxial layer disposed below the first epitaxial layer, a conductive layer disposed below and directly contacting the second epitaxial layer, and a plurality of spacers disposed between the second epitaxial layer and the conductive layer. The conductive layer includes a metal. The plurality of spacers include a bulk semiconductor material.

Devices with backside metal structures and methods of formation thereof

Devices and methods are provided where a control terminal resistance of a transistor device is set depending on operating conditions within a specified range of operating conditions.

Switch device

A body structure and a drift zone are formed in a semiconductor layer, wherein the body structure and the drift zone form a first pn junction. A silicon nitride layer is formed on the semiconductor layer. A silicon oxide layer is formed from at least a vertical section of the silicon nitride layer by oxygen radical oxidation.

Forming silicon oxide layers by radical oxidation and semiconductor device with silicon oxide layer

In accordance with an embodiment of an integrated circuit, a cavity is buried in a semiconductor body below a first surface of the semiconductor body. An active area portion of the semiconductor body is arranged between the first surface and the cavity. The integrated circuit further includes a trench isolation structure configured to provide a lateral electric isolation of the active area portion.

Isolation of semiconductor device with buried cavity

A semiconductor device includes a trench extending through a semiconductor substrate and an epitaxial layer disposed over a first side of the semiconductor substrate. The epitaxial layer partially fills a portion of the trench. The semiconductor device further includes a back side metal layer disposed over a second side of the semiconductor substrate. The back side metal layer extends into the trench and fills the remaining portion of the trench. The epitaxial layer partially filling the trench contacts the back side metal layer filling the remaining portion within the trench.

According to various embodiments, a method for processing a substrate may include: processing a plurality of device regions in a substrate separated from each other by dicing regions, each device region including at least one electronic component; wherein processing each device region of the plurality of device regions includes: forming a recess into the substrate in the device region, wherein the recess is defined by recess sidewalls of the substrate, wherein the recess sidewalls are arranged in the device region; forming a contact pad in the recess to electrically connect the at least one electronic component, wherein the contact pad has a greater porosity than the recess sidewalls; and singulating the plurality of device regions from each other by dicing the substrate in the dicing region.

Method of processing a porous conductive structure in connection to an electronic component on a substrate

In accordance with an embodiment of the present invention, a method of fabricating a semiconductor device includes forming openings partially filled with a sacrificial material, where the openings extend into a semiconductor substrate from a first side. A void region is formed in a central region of the openings. An epitaxial layer is formed over the first side of the semiconductor substrate and the openings, where the epitaxial layer covers the void region. From a second side of the semiconductor substrate opposite to the first side, the semiconductor substrate is thinned to expose the sacrificial material. The sacrificial material in the openings is removed and the epitaxial layer is exposed. A conductive material is deposited on the exposed surface of the epitaxial layer.

Method of wafer thinning and realizing backside metal structures

A semiconductor device includes a power transistor in a semiconductor substrate portion, where the semiconductor substrate portion includes a central portion and a kerf, components of the power transistor are arranged in the central portion, and the central portion has a thickness d. The semiconductor device also includes a support element disposed over a main surface of the central portion, where the support element has a smallest lateral extension t at a side adjacent to the main surface of the semiconductor substrate portion and a height h, where 0.1&#xd7;h&#x2264;d&#x2264;4&#xd7;h and 0.1&#xd7;h&#x2264;t&#x2264;1.5&#xd7;h.

Method of manufacturing a semiconductor device comprising a support element and semiconductor device comprising a support element

An integrated circuit device including a chip die having a first area with a first thickness surrounding a second area with a second thickness, the first thickness is greater than the second thickness, the chip die having a front-side and a back-side, at least one passive electrical component provided at least one of in or over the chip die in the first area on the front-side, and at least one active electrical component provided at least one of in or over the chip die in the second area on the front-side.

Monolithically integrated chip including active electrical components and passive electrical components with chip edge stabilization structures

A method for forming a semiconductor device includes forming a plurality of non-semiconductor material portions at a first side of a semiconductor substrate; forming semiconductor material on the plurality of non-semiconductor material portions to bury the plurality of non-semiconductor material portions within semiconductor material; removing at least a portion of the semiconductor substrate from a second side of the semiconductor substrate to uncover the plurality of non-semiconductor material portions at a backside of the semiconductor device; and forming a rough surface at the backside of the semiconductor device by removing at least a subset of the plurality of non-semiconductor material portions while at least a part of a semiconductor material located laterally between the plurality of non-semiconductor material portions remains or by removing at least a part of a semiconductor material located laterally between the plurality of non-semiconductor material portions while the plurality of non-semiconductor material portions remain.

Methods for forming a semiconductor device and semiconductor devices

Growing community of inventors

Neubiberg, Germany

Oliver Hellmund