X Development LLC

Google Inc.

Oliver Edward Bowen

Edward Allen Keyes

Baris Ibrahim Erkmen

Bruce Moision

Thomas James Norrie

Devin Brinkley

Matthew William Ashcraft

Mark William Gottscho

DMA architectures capable of performing multi-level multi-striding and determining multiple memory addresses in parallel are described. In one aspect, a DMA system includes one or more hardware DMA threads. Each DMA thread includes a request generator configured to generate, during each parallel memory address computation cycle, m memory addresses for a multi-dimensional tensor in parallel and, for each memory address, a respective request for a memory system to perform a memory operation. The request generator includes m memory address units that each include a step tracker configured to generate, for each dimension of the tensor, a respective step index value for the dimension and, based on the respective step index value, a respective stride offset value for the dimension. Each memory address unit includes a memory address computation element configured to generate a memory address for a tensor element and transmit the request to perform the memory operation.

Direct memory access architecture with multi-level multi-striding

The disclosure may provide for a communication method and system. A transmitter of the communication system may include an interleaver and a first encoder for determining parity bits. The transmitter also may include a multiplexer for joining the parity bits with the data. A second encoder may be positioned after the multiplexer for implementing an error correcting code. A receiver of the communication system may include a decoder followed by an interleaver. When errors are detected in received data at the decoder, one or more processors of the receiver may be configured to correct portions of the received data and combine the corrected portions with the received data.

Communication method and system with on demand temporal diversity

Aspects of the disclosure provide techniques for automatic repeat request (ARQ) in a free-space optical communication (FSOC) architecture. These techniques, including block-selective ARQ, adaptive retransmission delay, and random seed scrambling, can be used individually or in combination to combat problems involving frame loss or corruption. These techniques enable the system to rapidly recover by streamlining the retransmission process. For instance, block-selective ARQ acknowledges variable length blocks of frames in the return stream from the receiver to the transmitter. Adaptive retransmission delay allows the retransmission delay to grow in the absence of feedback by the receiver, up to some defined limit. And with random seed sampling, a scrambling sequence is incorporated to aid with frame syncing, which avoids the need for a line code. These aspects of the technology provide a robust communication process, and also reduce overhead costs associated with unnecessary retransmissions.

Efficient automatic repeat request for free space optical communication

Aspects of the disclosure provide for a method for determining a position of a beacon. A plurality of frames comprising pixel values is collected. Each frame is an image of a location. A static background of the location is determined by averaging the pixel values of the plurality of frames, pixel difference values are determined for each frame by subtracting the determined static background from the pixel values of each frame. Using the pixel difference values for each frame in the plurality of frames, a first subset of frames and a second subset of frames are identified. An average pixel difference is then determined by averaging the pixel difference values of the first subset of frames and an inverse of the pixel difference values of the second subset of frames. Using the average pixel difference, the position of a beacon at the location is determined.

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Redwood City, CA, United States of America

Oliver Edward Bowen