Telefonaktiebolaget Lm Ericsson (publ)

Oleg Avsan

Klaus Wildling

Nils K Isaksson

Bjorn E Jonsson

Sten E Johnson

Load sharing system and a method for processing of data and a

System for processing cooperation signals by storing and executing the

System and method for processing of memory data and communication system

Data processing system and method for accessing a common data memory

Method and device to execute two instruction sequences in an order

Multi-processing stored program controlled telecommunication

In a pipeline computer system having a plurality of serially connected registering means, each having input means, output means and storing means which, in response to a clock pulse transmits information stored in the storing means to the output means and thereafter stores information in the storing means which is present at the input means, apparatus for branching data from registering means acting as a source of incoming data flow to a plurality of outgoing information flow branches comprising: clock pulse generating means for generating clock pulses; source registering means responsive to the clock pulses for generating a flow of digital information words synchronous with the clock pulses and pluralities of digital branching bits synchronous with the clock pulses; a plurality of branch registering means each having an input means connected to the output means of said source registering means, clocking input means and an output means connected to one of the output information flow branches for, in response to an activating signal received at its clocking input means, transferring to the associated information flow branch digital information stored therein and then accepting for storage at least part of the digital information word then present at its input means; and a plurality of clock pulse locking means, each of said clock pulse locking means including input means for receiving a clock pulse and one of the digital branching bits and output means connected to the clocking input means of an associated branching register means for transmitting an activating signal thereto upon the occurrence of a clock pulse when the received branching bit has a particular value.

Arrangement for branching an information flow

Digital words of a pipelined incoming information flow are branched into a number of outgoing information flow branches. The term 'pipelined' means that the flow is transferred through memory means whose activation inputs are controlled by clock pulses, the memory means arranged successively with reference to the flow direction being coincidently activated to receive successive words of the flow. A digital branching information flow for ordering into which of the outgoing branches the incoming words have to be branched is generated in step with the incoming flow. The basis for each outgoing branch is obtained from the output of a branching register to which the incoming flow is supplied. The branching registers are activated by the clock pulses, but if an outgoing branch contains only a part of the incoming flow, an activation locking device is used in order to block the clock pulses in dependence on the respective branching information. The branching information flow may be transferred to the locking devices through branching information registers whose activation inputs may also be controlled by locking devices. A branching information register is, however, not to be controlled by the locking device connected to its own output.

Apparatus for indicating an abnormal program execution by a process controlling computer in, for example, a telecommunication system wherein the different programs, each consisting of one or more program sectors, are called for and executed within certain so-called priority levels. Each priority level includes a counter for supervising the execution of the programs on the level. This counter is stepped, for example, in its forward direction by a clock for measuring the time during which the computer works on the associated priority level and if a certain time limit is exceeded, a warning signal is obtained. For supervising the work of a certain program sector a second counter is arranged which is stepped in either direction by means of the clock and if a certain time limit is exceeded an alarm signal is obtained. The warning and alarm signals are delivered to the central processing unit of the computer via a control register for initiating an instruction program corresponding to the alarm or warning signal, respectively.

Apparatus for indicating abnormal program execution in a process

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Huddinge, Sweden

Oleg Avsan