Marvell Israel (Misl) Ltd.

Ohad Zalcman

Gil Levy

Galia Peleg

Aspects of the disclosure provide a first-in-first-out (FIFO) circuit having a memory block and a logic circuit. The memory block includes an array of memory cells configured to be able to store N data entries in a FIFO order (N is a positive integer). The logic circuit is configured to compare input data with previously input data to detect a number of consecutive identical entries of input data, and suppress an operation of selected memory cells when the number is larger than N.

Method and apparatus for optimizing power in FIFO

Systems and methods are provided for a network device. A device includes a plurality of packet processing clients. The device further includes a plurality of memories, where a quantity of the memories is greater than a quantity of the packet processing clients, each of the memories storing a replica of data, the packet processing clients being configured to selectively read the control data from any of the memories. An arbiter is configured to select in a first clock cycle for the plurality of packet processing clients a first subset of memories from among the plurality of memories from which to read the control data, and in a second clock cycle, subsequent to the first clock cycle, to select for the plurality of packet processing clients a second subset of memories from among the plurality of memories from which to read the control data.

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Magshimim, Israel

Ohad Zalcman