Hyundai Electronics Industries Co. Ltd.

Oh Bong Kwon

Suk Joong Lee

Woodward Yang

Min Hwahn Kim

Gyu Tae Hwang

Jae Won Eom

Jeong S Hyun

Kwon H Cha

Do Young Lee

Ki Nam Park

Jae H Song

The present invention relates to a picture display using CMOS (Complementary Metal Oxide Semiconductor) image sensor; and, more particularly, to a CMOS image sensor having a testing circuit embedded therein and a method for verifying operation of the CMOS image sensor using the testing circuit. The CMOS image sensor according to the present invention includes a control/interface unit for controlling its operation sensor using a state machine and for interfacing the CMOS image sensor with an external system; a pixel array including a plurality of pixels sensing images from an object and generating analogue signals according to an amount of incident light; a converter for converting the analogue signals into digital signals to be processed in a digital logic circuit; and a testing circuit for verifying operations of the converter and the control/interface unit, by controlling the converter.

CMOS image sensor with testing circuit for verifying operation thereof

A color filter array and its signal process circuit in which vertical interpolation process is not needed, which can be applied to the field of image signal input and signal process such as video camera, digital camera and color scanner, and color copier which process image signal. The color filter array is constituted such that the number of green color filter becomes double of those of red and blue color filter respectively in order to make human color recognition easy, and that the red and blue color filters are placed every four pixels and green color filter is placed every other pixel, such as a filter pattern consisting of R-G-B-G, G-R-G-R and B-G-R-G filter groups.

Color filter array and its color interpolation apparatus

The present invention relates to an image sensor; and, more particularly, to a CMOS image sensor employing photodiodes which linearly increase the ability of keeping up photogenerated charges. In accordance with the present invention, a unit pixel of a CMOS image sensor comprises: a photodiode including: a) an N-type semiconductor region and a P-type semiconductor region for a PN junction to which a reverse bias is applied; and b) a highly doped region formed on one of the N-type semiconductor region and the P-type semiconductor region for collecting carriers of electron-hole pairs generated in a depletion region of the PN junction so that a voltage drop of the reverse bias is linear; and an image data processing unit for producing an image data in response to the carriers transferred from the highly doped region.

Photodiode having charge transfer function and image sensor using the

A frequency generator is disclosed including a plurality of inverters employing the gate of a PMOS and NMOS as their common input, and employing the source of the PMOS and drain of the NMOS as their common output, the plurality of inverters being serially connected, the output node of the output inverter being connected to the input node of the input inverter; and a current mirror consisting of two transistors having the same electrical characteristic, the current mirror being connected to the source of the NMOS of the input inverter, a signal transmission delay time of the current mirror being controlled by a predetermined current value applied from an external current source.

Period controllable frequency generator

The present invention relates to a digital image processing system, for example, video cameras, digital cameras, cathode ray tubes (CRT) etc. With reference to the calculation of the brightness signal, the main idea of the present invention is to carry out the calculations of it by using only the additions, the subtractions and the shifts, which require relatively short operation times, without the multiplications and divisions by substituting only the shift operations of the digits for them. Also, according to the present invention, high resolution is accomplished by a high speed process in calculating the brightness of an image signal. Also, it enables high speed digital image processing.

Device and method for calculating a brightness signal

A digital/analog conversion apparatus with a color palette RAM for a multimedia, comprising a first latch circuit for inputting a pixel address signal, a pixel mask register for selectively masking the pixel address signal from the first latch circuit in response to a control signal from a microprocessor interface circuit, a second latch circuit for storing digital color information temporarily, and first to third digital/analog converters for converting the digital color information from the second latch circuit into analog R, G and B color information. The palette RAM stores digital color information from the microprocessor interface circuit and outputs the digital color information stored in its location corresponding to the pixel address signal from the pixel mask register to the second latch circuit. The apparatus also comprises first to third switching circuits for inputting the digital color information from the color palette RAM, digital video color information from an external video medium and external digital color information from a pixel address signal input line and selectively outputting the inputted information in response to external first to third control signals, and a third latch circuit for transferring the output information from the second switching circuit to a digital color information output terminal.

Digital/analog conversion apparatus having color palette RAM for

A digital/analog converter circuit comprising first to third transistors, the first transistor having a gate terminal for inputting a constant voltage and one side terminal for inputting a power source voltage, the second transistor having a gate terminal for inputting a first digital signal, one side terminal connected to the other side terminal of the first transistor and the other side terminal forming a first output terminal, the third transistor having a gate terminal for inputting a second digital signal of the opposite phase to that of the first digital signal, one side terminal connected to the other side terminal of the first transistor and the other side terminal forming a second output terminal. A buffer part buffers a digital input signal to provide the second digital signal. An inverter part inverts the digital input signal to provide the first digital signal. The inverter part includes a first compensator for removing an input transfer time difference between the second and third transistors in response to the output of the buffer part. A second compensator removes floating electrons from the inverter part in response to the digital input signal. A third compensator compensates for a poor '0' logical state transfer capability of the buffer part in response to the output of the inverter part.

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Ichon-shi, South Korea

Oh Bong Kwon