Apple Inc.

Anobit Technologies Ltd.

Texas Instruments Corporation

Tensera Networks Ltd.

Other

Parallel Machines Ltd.

Intel Corporation

Libit Signal Processing Inc.

Ofir Shalvi

Naftali Sommer

Dotan Sokolov

Uri Perlmutter

Eyal Gurgi

Oren Golov

Yoav Kasorla

Micha Anholt

Zvi Reznic

Ariel Yagil

Itay Lusky

Shai Winter

Mordechai Segal

Daniel Wajcer

Ariel Maislos

Yigal Bitran

Julian Vlaiko

Moshe Neerman

Yosef Bendel

Eli Haim

Barak Rotbard

Or Ordentlich

Zeev Cohen

Daniel Yellin

Gil Semo

Ronen Dar

Gal Zuckerman

Shimon Moshavi

Lior Khermosh

Avner Braverman

David Ben Eli

Eilon Regev

Mati Amit

Tavi Salomon

Michael Shachar

Ofer Bar-Or

Ran Senderovitz

Avraham Poza Meir

Liran Brecher

Etai Zaltsman

Lior Ophir

Yair Schwartz

Yoav Kasoria

Eyal Benjamin Raz Oren

A method for content delivery includes selecting one or more time intervals. During each time interval among the selected time intervals, given content is prefetched from a content source to a communication terminal using a guaranteed prefetching mode, by continuously tracking the given content on the content source, so as to detect changes to the given content as they occur during the selected time interval, and maintaining the communication terminal continuously synchronized with the content source with respect to the given content, throughout the selected time interval, notwithstanding the changes that occur during the selected time interval, by continuously prefetching at least part of the given content from the content source to the communication terminal. Outside of the one or more selected time intervals, the given content is prefetched using a best-effort prefetching mode, by tracking the given content less frequently than the guaranteed prefetching mode.

Efficient content delivery over wireless networks using guaranteed prefetching

Efficient content delivery over wireless networks using guaranteed prefetching at selected times-of-day

A method for data storage includes storing data in a group of analog memory cells by writing respective input storage values to the memory cells in the group. After storing the data, respective output storage values are read from the analog memory cells in the group. Respective confidence levels of the output storage values are estimated, and the confidence levels are compressed. The output storage values and the compressed confidence levels are transferred from the memory cells over an interface to a memory controller.

Efficient readout from memory cells using data compression

A method for data storage includes storing first data bits in a set of multi-bit analog memory cells at a first time by programming the memory cells to assume respective first programming levels. Second data bits are stored in the set of memory cells at a second time that is later than the first time by programming the memory cells to assume respective second programming levels that depend on the first programming levels and on the second data bits. A storage strategy is selected responsively to a difference between the first and second times. The storage strategy is applied to at least one group of the data bits, selected from among the first data bits and the second data bits.

Programming schemes for multi-level analog memory cells

A method for data storage includes storing data in a memory that includes one or more memory units, each memory unit including memory blocks. The stored data is compacted by copying at least a portion of the data from a first memory block to a second memory block, and subsequently erasing the first memory block. Upon detecting a failure in the second memory block after copying the portion of the data and before erasure of the first memory block, the portion of the data is recovered by reading the portion from the first memory block.

Redundant data storage schemes for multi-die memory systems

A method for content delivery includes defining a guaranteed prefetching mode, in which content is continuously prefetched from a content source to a communication terminal of a user so as to maintain the communication terminal synchronized with the content source. One or more time-of-day intervals, during which the user is expected to access given content, are identified. During the identified time-of-day intervals, the given content is prefetched from the content source to the communication terminal using the guaranteed prefetching mode.

Various systems and methods to facilitate general communication, via a memory network, between compute elements and external destinations, while at the same time facilitating low latency communication between compute elements and memory modules storing data sets, without impacting negatively the latency of the communication between the compute elements and the memory modules. General communication messages between compute nodes and a gateway compute node are facilitated with a first communication protocol adapted for low latency transmissions. Such general communication messages are then transmitted to external destinations with a second communication protocol that is adapted for the general communication network and which may or may not be low latency, but such that the low latency between the compute elements and the memory modules is not negatively impacted. The memory modules may be based on RAM or DRAM or another structure allowing low latency access by the compute elements.

Systems and methods to communicate with external destinations via a memory network

A method for operating a memory includes storing data in a plurality of analog memory cells that are fabricated on a first semiconductor die by writing input storage values to a group of the analog memory cells. After storing the data, multiple output storage values are read from each of the analog memory cells in the group using respective, different threshold sets of read thresholds, thus providing multiple output sets of the output storage values corresponding respectively to the threshold sets. The multiple output sets of the output storage values are preprocessed by circuitry that is fabricated on the first semiconductor die, to produce preprocessed data. The preprocessed data is provided to a memory controller, which is fabricated on a second semiconductor die that is different from the first semiconductor die. so as to enable the memory controller to reconstruct the data responsively to the preprocessed data.

Memory device with internal signal processing unit

A method for operating a memory () includes storing data, which is encoded with an Error Correction Code (ECC), in analog memory cells () of the memory by writing respective analog input values selected from a set of nominal values to the analog memory cells. The stored data is read by performing multiple read operations that compare analog output values of the analog memory cells to different, respective read thresholds so as to produce multiple comparison results for each of the analog memory cells. At least two of the read thresholds are positioned between a pair of the nominal values that are adjacent to one another in the set of the nominal values. Soft metrics are computed responsively to the multiple comparison results. The ECC is decoded using the soft metrics, so as to extract the data stored in the analog memory cells.

Reading memory cells using multiple thresholds

Various systems to achieve data resiliency in a shared memory pool are presented. Multiple memory modules are associated with multiple data interfaces, one or multiple erasure-coding interfaces are communicatively connected with the multiple data interfaces, and multiple compute elements are communicatively connected with one or multiple erasure-coding interfaces. Data sets are erasure-coded, and the resulting fragments are stored in random access memory modules distributed throughout the system. Storage in RAM allows real-time fetching of fragments using random-access read cycles and streaming of fragments using random-access write cycles, in which read operations include reconstruction of data sets from fetched data fragments, and write operations allow conversion of data sets into fragments which are then streamed and distributively stored. Distributed memory creates data resiliency to reconstruct original data sets in cases such as data corruption, failure of a memory module, failure of a data interface, or failure of a compute element.

Data resiliency in a shared memory pool

A method for data storage includes, in a memory that includes multiple memory blocks, specifying at a first time a first over-provisioning overhead, and storing data in the memory while retaining in the memory blocks memory areas, which do not hold valid data and whose aggregated size is at least commensurate with the specified first over-provisioning overhead. Portions of the data from one or more previously-programmed memory blocks containing one or more of the retained memory areas are compacted. At a second time subsequent to the first time, a second over-provisioning overhead, different from the first over-provisioning overhead, is specified, and data storage and data portion compaction is continued while complying with the second over-provisioning overhead.

Adaptive over-provisioning in memory systems

A method for operating a memory () includes storing data in a group of analog memory cells () of the memory as respective first voltage levels. After storing the data, second voltage levels are read from the respective analog memory cells. The second voltage levels are affected by cross-coupling interference causing the second voltage levels to differ from the respective first voltage levels. Cross-coupling coefficients, which quantify the cross-coupling interference among the analog memory cells, are estimated by processing the second voltage levels. The data stored in the group of analog memory cells is reconstructed from the read second voltage levels using the estimated cross-coupling coefficients.

Distortion estimation and cancellation in memory devices

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Raanana, Israel

Ofir Shalvi