Fairchild Korea Semiconductor Ltd.

O-seob Jeon

Joon-seo Son

Seung-won Lim

Keun-hyuk Lee

Byoung-ok Lee

Seung-Yong Choi

Joo-sang Lee

Yun-hwa Choi

Sung-Min Park

Gwi-gyeon Yang

Shi-baek Nam

Young-gil Kim

Joo-yang Eom

Gi-young Jeun

Taek-keun Lee

Sung-won Lim

Rajeev Dinkar Joshi

Seungwon Im

Maria Cristina B Estacio

Yoon-hwa Choi

Dae-Woong Chung

Gi-Young Jeun

Seung-Won Lim

Gi-young Jeon

Adams Zhu

Eul-bin Im

Byeong Gon Kim

Seung-jin Kim

Seung-won Im

Yong-suk Kwon

Frank Chen

Keun-kyuk Lee

In-goo Kang

Keun Hyuk Lee

Ji-hwan Kim

A semiconductor package with a leadframe to mount a transistor device prevents malfunction. The semiconductor package includes a leadframe including at least one or more transistor die attach pads where a first transistor device and a second transistor device are arranged, a driver die attach pad where a driver semiconductor chip is arranged, a first driver lead electrically connected to the driver semiconductor chip, and a second driver lead arranged between the first driver lead and the at least one or more transistor die attach pads, a chip bonding wire electrically connecting the first transistor device with the driver semiconductor chip, a first transistor bonding wire electrically connecting the first driver lead with the second transistor device, and a first insulator arranged on the second driver lead to insulate the second driver lead and the first transistor bonding wire from each other.

Semiconductor package

Provided are a power module having a stacked flip-chip and a method of fabricating the power module. The power module includes a lead frame; a control device part including a control device chip; a power device part including a power device chip and being electrically connected to the lead frame; and an interconnecting substrate of which the control and power device parts are respectively disposed at upper and lower portions, and each of the control and power device chips may be attached to one of the lead frame and the interconnecting substrate using a flip-chip bonding method. The method includes forming bumps on power and control device chips on a wafer level; separately sawing the power and control device chips into individual chips; adhering the power device chip onto a thermal substrate and the control device chip onto an interconnecting substrate; combining a lead frame, the thermal substrate, and the interconnecting substrate with one another in a multi-jig; and sealing the power and control device chips, and the control and power device chips may be attached to one of the lead frame and the interconnecting substrate using a flip-chip bonding method.

Power module having stacked flip-chip and method for fabricating the power module

A metal tab die attach paddle (DAP) disposed between the lead frame and a power device die in a power device package reduces the stress exerted on the semiconductor power device die caused by the different coefficients of thermal expansion (CTE) of the semiconductor power device die and the lead frame. In addition the power device package substantially prevents impurities from penetrating into the power device package by increasing the surface creepage distance of a sealant resulting from the metal tab DAP and an optional swaging of the lead frame.

Power device package comprising metal tab die attach paddle (DAP) and method of fabricating the package

Power module having stacked flip-chip and method of fabricating the power module

Provided is a semiconductor package having a power device and methods of fabricating the same. The semiconductor package includes a lead frame, a polymer layer component on the lead frame, a metal layer component on the polymer layer component, and a semiconductor chip on the metal layer component. The polymer layer component may include a material formed by adding alumina AlO, an aluminum nitride (AlN), or a boron nitride BN to an epoxy resin. The polymer layer component may have high thermal conductivity and good electric insulating characteristics.

Semiconductor package and methods of fabricating the same

Provided are a heat sink package in which a semiconductor package and a heat sink are bound to each other and a method of fabricating the same. The heat sink package includes a heat sink having a cavity on an upper surface thereof; a metal layer formed on the bottom surface of the cavity; a solder paste layer formed on the metal layer; a substrate on the solder paste layer; and a lead and a semiconductor chip mounted on the substrate.

Heat sink package

A power module with low thermal resistance buffers the stress put on a substrate during a package molding operation to virtually always prevent a fault in the substrate of the module. The power module includes a substrate, a conductive adhesive layer formed on the substrate, a device layer comprising a support tab, a power device, and a passive device which are formed on the conductive adhesive layer, and a sealing material hermetically sealing the device layer. The support tab is buffers the stress applied by a support pin to the substrate, thereby virtually always preventing a ceramic layer included in the substrate from cracking or breaking. As a result, a reduction in the isolation breakdown voltage of the substrate is virtually always prevented and the failure of the entire power module is do to a reduction in the breakdown voltage of the substrate is virtually always prevented.

Power module for low thermal resistance and method of fabricating the same

A power device package according to the one embodiment of the present invention includes an insulating substrate with an interconnection pattern disposed on the insulating substrate. The interconnection pattern comprises a single conductive layer comprising a first metal layer, and a multiple conductive layer comprising another first metal layer and a second metal layer disposed on the another first metal layer. A plurality of wires are attached to an upper surface of the single conductive layer and/or an upper surface of the second metal layer of the multiple conductive layer. Contact pads on a power control semiconductor chip and a low power semiconductor chip driving the power control semiconductor chip are electrically connected to the wires.

Power device package

Provided are a power module including a power package and a control package that are provided separately and can be highly integrated, and method of fabricating the power module. The power module includes: a molded power package including at least one power device on a first lead frame; and a molded control package vertically stacked on the power package, and including at least one control device on a second lead frame. A first part of the first lead frame and a first part of the second lead frame are coupled to each other so that the power package and the control package can be electrically coupled to each other.

Power module and method of fabricating the same

Provided are a molded leadless package, and a sawing type molded leadless package and method of manufacturing same. The molded leadless package includes a lead frame pad having first and second surfaces opposite to each other. A semiconductor chip is adhered to the first surface of the lead frame pad. A lead is electrically coupled to the semiconductor chip. A molding material covers the lead frame pad, the semiconductor chip, and the lead and exposes a portion of the lead and a portion of the second surface of the lead frame pad. A step difference is formed between a surface of the molding material covering the second surface of the lead frame pad and the second surface of the lead frame pad itself. The sawing type molded leadless package includes a short-circuit preventing member that is post-shaped or convex, and protruding from the lower surface of the die pad.

Molded leadless package having a partially exposed lead frame pad

A power module package is provided. The power module package includes a power circuit element, a control circuit element, a lead frame, a heat sink, and an epoxy molding compound (EMC). The control circuit element is connected to the power circuit and controls chips in the power circuit. The lead frame has external connecting means formed at the edges thereof, and a down set part, namely, formed between the external connecting means. The lead frame has a first surface to which the power circuit and the control circuit are attached, and a second surface used as a heat dissipating path, in particular, the power circuit is attached to the down set part. The heat sink which is closely attached to the down set part of the second surface of the lead frame by an adhesive. The EMC surrounds the power circuit, the control circuit, the lead frame and the heat sink, and exposes the external connecting means of the lead frame and a side of the heat sink.

Power module package having improved heat dissipating capability

Growing community of inventors

Seoul, South Korea

O-seob Jeon