Agilent Technologies, Inc.

Avago Technologies General IP (Singapore) Pte. Ltd.

Avago Technologies Ecbu IP (Singapore) Pte. Ltd.

Avago Technologies Enterprise IP (Singapore) Pte. Ltd.

Nurwati Suwendi Devnani

Charles E Moore

James Oliver Barnes

Benny W H Lai

Mark A Hinton

Kenneth Paul Parker

Robert B Manley

William Scott Burton

Adam Gallegos

Sari K Christensen

Minh Van Quach

Regee Petaja

Hyacinth Tok

Lin Wang

John Connor

Wang Lin

A system for using a reference plane to control transmission line characteristic impedance includes a signal trace located in a multi-layer structure and at least one constant thickness reference plane proximate to the signal trace, the constant thickness reference plane located with respect to the signal trace so as to provide a desired characteristic impedance between the signal trace and the constant thickness reference plane.

System and method for using a reference plane to control transmission line characteristic impedance

A laminate interconnect structure includes a core material and at least one additional layer adjacent the core material, a first electrically conductive via formed in the core material, and a second electrically conductive via formed in the core material, coaxial with the first electrically conductive via and separated from the first electrically conductive via by a non-conductive material.

Laminate interconnect having a coaxial via structure

Integrated circuit transmission lines are designed to match elements at opposing ends of the transmission line over a frequency range of interest. By modifying characteristics of the transmission line over the length of the transmission line, from a first end coupled to a first external element to a second end coupled to a second external element, return loss is improved. In various embodiments one or more of the width of the conductors and the distance between adjacent edges of the conductors are modified across the length of the transmission line. In an alternative embodiment, the conductors of the transmission line are segmented with each segment having a length and a width across the segment.

Integrated circuit transmission lines, methods for designing integrated circuits using the same and methods to improve return loss

Systems, devices and methods are disclosed herein for reducing crosstalk between pairs of differential signal conductors. One or more ground traces connected to one or more over- or under-lying ground planes by vias are located between pairs of differential signal conductors. The electrical shielding provided by the combination of the one or more ground traces and the one or more ground planes results in reduced cross-talk between different pairs of differential signal conductors, and facilitates high-speed data rates between integrated circuits and printed circuit boards. In a preferred embodiment, such ground traces and ground planes are employed in HiTCE packaging containing multiple pairs of differential signal conductors.

System, device and method for reducing cross-talk in differential signal conductor pairs

A packaged IC includes an IC die with signal and signal complement traces positioned relative to each other to maximize broadside coupling for a matching impedance. The signal and signal complement traces are electrically connected to transmission or receive channels of the IC die. Use of a broadside coupled trace configuration alleviates routing congestion in an IC package and permits an IC to accommodate a greater number of channels within a given surface area than is possible under the prior art.

Integrated circuit package

Integrated circuit and method of manufacturing an integrated circuit and package

In a method for testing continuity of electrical paths through a connector, pairs of contacts of the connector are coupled via a first plurality of passive circuit components. The contacts are also coupled to a test sensor port via a second plurality of passive circuit components, ones of which are coupled in parallel to the test sensor port. The method proceeds with stimulating one or more nodes of the connector, and then measuring an electrical characteristic via the test sensor port. Finally, the measured electrical characteristic is compared to at least one threshold to assess continuities of at least two electrical paths through the connector.

Methods and apparatus for diagnosing defect locations in electrical paths of connectors of circuit assemblies

A high-performance, integrated circuit interconnection laminate. Power/ground layers in laminates fabricated with open areas to permit out gassing of gases generated during high temperature lamination are located such that they do not lie under/over critical traces on signal layers. This placement of the open areas enables a reduction in cross-talk between signal layers lying on opposite sides of a power/ground layer and a reduction in signal delay.

High-performance laminate for integrated circuit interconnection

Growing community of inventors

Fort Collins, CO, United States of America

Nurwati Suwendi Devnani