Microsoft Technology Licensing, LLC

Norman C Lam

Daniel Max Firestone

Sambhrama Madhusudhan Mundkur

Somesh Chaturmohta

Alec Kochevar-Cureton

Andrew Richard Putnam

Fengfen Liu

Techniques are disclosed for implementing direct memory access in a virtualized computing environment. A memory access policy of the virtualized computing environment is applied to a direct memory access connection request received from a first virtual machine via an exception path. The request is flagged to indicate that the request has been processed and the request is forwarded to a network interface device configured to execute offloaded network functions for one or more virtual machines. A memory access policy of the virtualized computing environment is applied to a direct memory access connection reply received from a second virtual machine on the exception path. The reply is flagged to indicate that the reply has been processed and the reply is forwarded to the network interface device. A direct memory access connection is established between first and second virtual machines in accordance with the request.

RDMA with virtual address space

Distributed computing systems, devices, and associated methods of packet routing are disclosed herein. In one embodiment, a method includes receiving, from a computing network, a packet at a packet processor of a server. The method also includes matching the received packet with a flow in a flow table contained in the packet processor and determining whether the action indicates that the received packet is to be forwarded to a NIC buffer in the outbound processing path of the packet processor instead of the NIC. The method further includes in response to determining that the action indicates that the received packet is to be forwarded to the NIC buffer, forwarding the received packet to the NIC buffer and processing the packet in the NIC buffer to forward the packet to the computer network without exposing the packet to the main processor.

Network traffic routing in distributed computing systems

Distributed computing systems, devices, and associated methods of packet routing are disclosed herein. In one embodiment, a computing device includes a field programmable gate array ('FPGA') that includes an inbound processing path and outbound processing path in opposite processing directions. The inbound processing path can forward a packet received from the computer network to a buffer on the FPGA instead of the NIC. The outbound processing path includes an outbound multiplexer having a rate limiter circuit that only forwards the received packet from the buffer back to the computer network when a virtual port corresponding to the packet has sufficient transmission allowance. The outbound multiplexer can also periodically increment the transmission allowance based on a target bandwidth for the virtual port.

Network traffic rate limiting in computing systems

Distributed computing systems, devices, and associated methods of remote direct memory access ('RDMA') packet routing are disclosed herein. In one embodiment, a server includes a main processor, a network interface card ('NIC'), and a field programmable gate array (&#x201c;FPGA&#x201d;) operatively coupled to the main processor via the NIC. The FPGA includes an inbound processing path having an inbound packet buffer configured to receive an inbound packet from the computer network, a NIC buffer, and a multiplexer between the inbound packet buffer and the NIC, and between the NIC buffer and the NIC. The FPGA also includes an outbound processing path having an outbound action circuit having an input to receive the outbound packet from the NIC, a first output to the computer network, and a second output to the NIC buffer in the inbound processing path.

Growing community of inventors

Sammamish, WA, United States of America

Norman C Lam