Fujitsu Corporation

Fujitsu Semiconductor Limited

Semiconductor Technology Academic Research Center

Philtech Inc.

Tohoku University

Fujitsu Microelectronics Limited

Noriyoshi Shimizu

Takashi Suzuki

Nobuyuki Ohtsuka

Yoshiyuki Nakao

Michie Sunayama

Hideki Kitada

Hisaya Sakai

Masaki Haneda

Junichi Koike

Shinji Nishihara

Yuji Furumura

Masaki Yoshimaru

Naomi Mura

Hiroki Kondo

Hideki Shibata

Takamasa Usui

Makoto Wada

Hayato Nasu

Shingo Takahashi

Satoshi Nishikawa

Kenichi Watanabe

Takahiro Tabira

Yuji Awano

Koji Arita

Nobuyuki Nishikawa

Yoshito Fujii

Jun Iijima

Kazuyoshi Maekawa

Ryotaro Yagi

Shintaro Sato

Masato Ishikawa

Toshiya Suzuki

Yukio Takigawa

Takayuki Ohba

Tsuyoshi Kanki

Yoshiyuki Nakano

Hajime Kawabe

Eri Haikata

Noboyuki Ohtsuka

A film-forming method for forming a film in a film-forming apparatus includes generating first gas molecular species and second gas molecular species by causing the first source gas and the second source gas accumulated in the accumulation mechanisms to pass through respective instantaneously-heating units, sharply raising partial pressure of the first gas molecular species and partial pressure of the second gas molecular species by projectingly supplying the first gas molecular species and the second gas molecular species to the reaction chamber in which the substrate has been placed, which has been depressurized, and which has a constant capacity; bringing the first gas molecular species or the second gas molecular species into reaction by alternately repeatedly guiding the first gas molecular species or the second gas molecular species to a surface of the substrate, and forming a compound film on the surface of the substrate.

Film-forming method

A small-sized fluid heating/cooling apparatus for heating or cooling a large amount of gas or liquid at a low cost. Structures where a flow passage for a fluid is formed in a heated or cooled base formed in a plate shape or a column shape, and a fluid which has passed through the narrowed flow passage impinges on a wall of a side face of the base vertically to perform heat exchange are connected in series. Heat exchange is instantaneously performed in a small space and manufacture of a mechanism performing such an operation is easy. A material constituting the flow passage may be a metal or ceramics, and a small-sized fluid heat exchanging apparatus can be manufactured at a low cost.

Fluid heat exchanging apparatus

In a small-sized fluid heat exchanging apparatus that heats or cools a huge amount of gas or liquid, a structure makes fluid having a high flow speed impinge perpendicularly against a wall. A flow passage is divided into a high-speed flow passage and a low-speed flow passage, and the high-speed flow passage and the low-speed flow passage are arranged so as to intersect perpendicularly with each other, according to guidelines for the shape of the flow passage. A flow passage designed according to the guidelines provides highly-efficient heat exchange.

A deposition method of fine particles, includes the steps of irradiating a fine particle beam formed by size-classified fine particles to an irradiated subject under a vacuum state, and depositing the fine particles on a bottom part of a groove structure formed at the irradiated subject.

Forming method and forming apparatus of carbon nanotubes

A semiconductor device includes a semiconductor substrate, an oxygen-containing insulating film disposed above the above-described semiconductor substrate, a concave portion disposed in the above-described insulating film, a copper-containing first film disposed on an inner wall of the above-described concave portion, a copper-containing second film disposed above the above-described first film and filled in the above-described concave portion, and a manganese-containing oxide layer disposed between the above-described first film and the above-described second film. Furthermore, a copper interconnection is formed on the above-described structure by an electroplating method and, subsequently, a short-time heat treatment is conducted at a temperature of 80&#xb0; C. to 120&#xb0; C.

Semiconductor device and method for manufacturing the same

A solid gasification apparatus includes a reaction chamber thermally insulated by a heat insulating material, a heat beam fluid heat exchange apparatus that produces a first heated gas and a second heated gas, and a unit that includes a gas flow path. The unit sprays the first heated gas against a material solid in a reaction chamber to heat the material solid, and, simultaneously, makes the material solid react with the first heated gas to produce a produced gas containing the element of the material solid. The unit makes a second heated gas contact and react with the produced gas.

Solid gasification apparatus

Manufacturing method of semiconductor device

Provided is a fluid heating device that is small in size and capable of heating a large flow of gas or liquid at a low cost. A flow path in which no backwater is produced is provided by providing grooved flow paths of a fluid are provided over an outer side surface of a metallic circular cylinder such that a fluid passing through a narrowed one of the flow paths impinges perpendicularly against a wall of the next flow path. This allows instantaneous heat exchange within a small space, and makes manufacturing of such a structure simple.

Fluid heating-cooling cylinder device

A multilevel interconnect structure in a semiconductor device and methods for fabricating the same are described. The multilevel interconnect structure in the semiconductor device includes a first insulating layer formed on a semiconductor wafer, a Cu interconnect layer formed on the first insulating layer, a second insulating layer formed on the Cu interconnect layer, and a metal oxide layer formed at an interface between the Cu interconnect layer and the second insulating layer. The metal oxide layer is formed by immersion-plating a metal, such as Sn or Zn, on the Cu interconnect layer and then heat-treating the plated layer in an oxidizing atmosphere.

Semiconductor device having a multilevel interconnect structure and method for fabricating the same

A semiconductor device includes a first conductor formed over a semiconductor device; an insulation film formed over the semiconductor substrate and the first conductor and having an opening arriving at the first conductor; a first film formed in the opening and formed of a compound containing Zr; a second film formed over the first film in the opening and formed of an oxide containing Mn; and a second conductor buried in the opening and containing Cu.

Semiconductor device and method for manufacturing semiconductor device

A method for producing a semiconductor device including a first conductor disposed on a semiconductor substrate; an oxygen-containing insulation film disposed on the semiconductor substrate and on the first conductor, the insulation film having a contact hole which extends to the first conductor and a trench which is connected to an upper portion of the contact hole; a zirconium oxide film disposed on a side surface of the contact hole and a side surface and a bottom surface of the trench; a zirconium film disposed on the zirconium oxide film inside the contact hole and inside the trench; and a second conductor composed of Cu embedded into the contact hole and into the trench.

Semiconductor device having a conductor buried in an opening

A micronized wiring structure is obtained by optimizing film forming modes of barrier metal films as being adapted respectively to a via-hole and a wiring groove, wherein sputtering processes are adopted herein, which are specifically the multi-step sputtering process for formation of the barrier metal film over the via-hole, and the one-step, low-power sputtering process for formation of the barrier metal film over the wiring groove, to thereby realize improved electric characteristics such as via-hole resistance and wiring resistance, and improved wiring reliabilities such as Cu filling property and electro-migration resistance.

Method of forming wiring structure and semiconductor device comprising underlying refractory metal layers

A multilevel interconnect structure in a semiconductor device includes a first insulating layer formed on a semiconductor wafer, a Cu interconnect layer formed on the first insulating layer, a second insulating layer formed on the Cu interconnect layer, and a metal oxide layer formed at an interface between the Cu interconnect layer and the second insulating layer. The metal oxide layer is formed by immersion-plating a metal, such as Sn or Zn, on the Cu interconnect layer and then heat-treating the plated layer in an oxidizing atmosphere.

Method of manufacturing a multilayer interconnection structure in a semiconductor device

Growing community of inventors

Kawasaki, Japan

Noriyoshi Shimizu