Matsushita Electric Industrial Co., Ltd.

Norisato Shimizu

Yasuyuki Naito

Kunihiko Nakamura

Yoshito Nakanishi

Bunji Mizuno

Shuichi Kameyama

Yasushi Naito

Yuichi Hirofuji

A switch comprises voltage applying means for providing direct current potentials to first to third beams arranged with a spacing slightly distant one from another, and electrodes for inputting/outputting signals to/from the beams. By controlling the direct current potential provided to the beam, an electrostatic force is caused to thereby change the beam positions and change a capacitance between the beams. By causing an electrostatic force between the first and second beams and moving the both beams, the first and second beams can be electrically coupled together at high speed. Also, an electrostatic force is caused on the third beam arranged facing to the first and second beams, to previously place it close to the first and second beams. When the electrostatic force is released from between the first and second beams, the second beam moves toward the third beam thereby releasing the first and second beams of an electric coupling.

Switch

Disclosed is a switch having a movable electrode to be separately driven downward and upward to secure signal transmission efficiency and insulation capability and operate for signal connection and disconnect at a high speed. The switch comprises a movable electrode, a fixed electrode positioned beneath the movable electrode, and a movable electrode driving fixed electrode positioned on both sides of the movable electrode with respect to a length wise direction thereof. Inside surfaces of the movable electrode, concave and convex parts are formed to arrange on both sides fixed electrodes having the corresponding concave and convex parts with a space.

Switch and method for manufacturing the same

Switch with current potential control

A switch for switching over a propagation path of external signal by contacting or non-contacting a movable member to or from an electrode. The switch comprises an input port for inputting an external signal, a movable member connected to the input port, a first electrode for propagating the external signal, a first control power supply connected to the first electrode and for generating a control signal, a second electrode for blocking the external signal, and a second control power supply connected to the second electrode and for generating a control signal. The first control power supply provides a control signal to the first electrode. The movable member is displaced by a driving force generated based on a potential difference between the movable member and first electrode and a potential difference between the movable member and second electrode, thereby being contacted to the first or second electrode.

A variable capacitor of the invention includes a beam having flexibility and an electrode provided close to the beam in order to form a capacitor with the beam. By applying a voltage to between the beam and the electrode to thereby deflect the beam by an electrostatic force, a capacitance between the both is changed. The deflected beam and the electrode are placed into contact through an insulation layer formed on a surface of at least one thereof, to change a contact area thereof, thereby changing the capacitance. Meanwhile, the electrode is divided in plurality. A recess is formed such that one electrode is lower than a height of another electrode surface. By applying a voltage to the beam and the electrode corresponding to the recess, the beam is pulled to an inside of the recess, thereby enabling to eliminate stiction.

Variable capacitor and method for manufacturing same

A first underlaid oxide layer, a polysilicon layer, and a first silicon nitride layer are formed on a silicon substrate in this order. Using a photoresist as a mask, a portion of the first silicon nitride layer, the polysilicon layer, the first underlaid oxide layer and the silicon substrate which is to be an isolation region is etched by a depth which regulates a length of bird's beak and a threshold voltage drop of a FET adequately. After forming a second underlaid oxide layer and a second silicon nitride layer, silicon nitride side walls of more than 25 nm in thickness are formed. An isolation oxide layer is formed by selective oxidation, using the silicon nitride layer as a mask. Favorable etched depth in the step of removing the silicon substrate is one third of the thickness of the isolation oxide layer. Favorable etched depth in case of a normal FET is 20-100 nm. Thus, bird's beak length is reduced, while adequately maintaining the threshold of the transistor at formation of the isolation of transistor. In a DRAM cell pattern, isolation of not exceeding 0.2 .mu.m width can be formed.

Method of forming isolation

A semiconductor device having superior electrical characteristics is fabricated. 50 nm of the surface of a CZ (100) silicon substrate is oxidized to form an oxidized film. Afterwards a first ion implantation of boron ions is conducted to this silicon substrate amounting to 7.times.10.sup.13 cm.sup.-2 with acceleration energy of 1.5 MeV. Next, a first annealing in nitrogen ambient at 1050.degree. C. for 40 minutes is conducted. Through this ion implantation process a damaged layer and a dopant layer are formed within the silicon substrate. Boron ions are implanted as a second ion implantation, with a dosage of 7.times.10.sup.13 cm.sup.-2, followed by a second implanted annealing in nitrogen ambient at 1050.degree. C. for 40 minutes. Further, as a third ion implantation, boron ions are implanted with a dosage of 6.times.10.sup.13 cm.sup.-2 followed by a third annealing in nitrogen ambient at 1050.degree. C. for 40 minutes. In the dopant layer thus formed, through a plurality of repeated high energy ion implantation and subsequent annealing, in order to obtain the desired dopant concentration, density of secondary defect occurrences may be lowered.

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Kanagawa, Japan

Norisato Shimizu