Hitachi, Ltd.

Norio Anzai

Hideki Yasuoka

Tomoyuki Watanabe

Tohru Nakamura

Minoru Nagata

Kenji Kaneko

Takahiro Okabe

Akira Muramatsu

Yutaka Okada

Akihiro Tomozawa

Yasunobu Tanizaki

Takanori Nishimura

Takashi Agatsuma

Akira Nagase

Masayasu Tsunematsu

The present invention relates to a Bi-CMOS.IC, characterized by comprising a semiconductor substrate of a first conductivity type, and a semiconductor layer of a second conductivity type which is epitaxially grown on one major surface of said semiconductor substrate and which is electrically isolated into a plurality of semiconductor island regions by a thick surface oxide film formed by local oxidation and a semiconductor diffused layer of the first conductivity type formed between said oxide film and said substrate; a bipolar type semiconductor element being formed in one of said island regions, while CMOS type semiconductor elements are formed in the other island regions; the thick surface oxide film formed by the local oxidation being included between a base region and a collector contact region within said one island region formed with said bipolar type semiconductor element, while gate electrodes made of a semiconductor are disposed over said other island regions formed with said CMOS type semiconductor elements.

Method of manufacturing a semiconductor integrated circuit device

The present invention relates to a method of manufacturing a semiconductor integrated circuit device, especially a Bi-MOS IC. It comprises:

Method of forming bifets by forming isolation regions connected by

A semiconductor IC device in which an N-type semiconductor layer is formed in a P-type semiconductor substrate; the N-type layer is divided by a P.sup.+ -type insulation region into plural island regions; and an IIL is formed in a first island region while an NPN transistor is formed in a second island region, wherein an N-type up-diffused layer is formed from the bottom of the first island region up while an N-type well region is formed from the surface of the first island region down, and N.sup.+ -type buried layers are formed near the bottoms of the first and the second island region.

IIL With in and outdiffused emitter pocket

A method of producing an MIS structure having self-alignment construction, wherein an insulating film is formed on the surface of a semiconductor substrate, a semiconductor layer is formed on a selected area of the insulating film, parts of the insulating film are etched using the semiconductor layer as a mask, and the surface of the semiconductor layer is etched in such manner that the underlying insulating film may not be etched, whereby the marginal portion of the semiconductor layer which otherwise projects laterally beyond the underlying insulating film is caused to recede.

Method of producing MIS structure

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Tokorozawa, Japan

Norio Anzai