Sony Corporation

Norikazu Ouchi

Hiroyuki Miwa

Takashi Noguchi

Takayuki Gomi

Hirokazu Ejiri

Shigeru Kanematsu

Katsuyuki Kato

Hiroaki Anmo

Akio Kayanuma

Katsuaki Asano

A semiconductor device and a manufacturing method therefor which can simultaneously realize both a reduction in base transit time by a reduction in base width and a reduction in base resistance by a reduction in link base resistance. The semiconductor device is manufactured by the method including the steps of forming a first impurity diffused layer of a first conduction type in a semiconductor substrate; forming a conducting film connected to the first impurity diffused layer; forming a first insulating film on the conducting film; forming a first hole through a laminated film composed of the first insulating film and the conducting film; forming a second impurity diffused layer of the first conduction type in the semiconductor substrate exposed to the first hole; forming a side wall from a second insulating film in the first hole to form a second hole; and forming a third impurity diffused layer of the first conduction type in the semiconductor substrate exposed to the second hole.

Manufacturing method for making bipolar device having double polysilicon

Manufacturing method for making bipolar device

Method for making bipolar transistor having double polysilicon structure

A lateral bipolar transistor including a transistor forming region provided on an insulating substrate; a first impurity diffusing region provided on the insulating substrate on one side of the transistor forming region; an emitter region formed in a first portion of the transistor forming region adjacent to the first impurity diffusing region, the emitter region being formed by diffusing a first conduction type of impurity from the first impurity diffusing region into the first portion of the transistor forming region; a base region formed in a second portion of the transistor forming region adjacent to the emitter region, the base region being formed by diffusing a second conduction type of impurity from the first impurity diffusing region into the second portion of the transistor forming region; and a collector region formed in a third portion of the transistor forming region adjacent to the base region. Accordingly, a base width can be reduced, and a dimensional accuracy of the base width can be improved.

SOI type semiconductor device and manufacturing method therefor

Method for manufacturing a semiconductor device utilizing self-aligned

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Kanagawa, Japan

Norikazu Ouchi