Pioneer Electronic Corporation

Pioneer Video Corporation

Norikazu Fujie

Saburo Takaoka

Hitoshi Sugiyama

A signal processing circuit for a telephone set. This circuit includes signal sending means that sends to a transmission line a sound signal produced from a telephone transmitter, a first adding circuit that adds the signal from the transmission line to the sound signal from the transmitter, an inverting circuit that phase-inverts the output signal from the first adding circuit, an impedance element provided between the transmission line and the output of the inverting circuit, and a second adding circuit that adds the output sound signal from the transmitter to the output signal from the inverting means and supplies the resulting composite signal to a telephone receiver.

Signal processsing circuit for a telephone set

A signal generating circuit for generating a delayed signal in response to a pulsed timing signal with a delay time which is not substantially affected by variations in supply voltage or temperature. A voltage comparator receives a first input from a voltage division point of a voltage dividing circuit coupled across a voltage source. The other input terminal of the comparator is coupled to a RC circuit and to one terminal of a switch, the other terminal of which is connected to the voltage source. The position of the switch is determined by the output of the timing signal source. If desired, a flip-flop having its set input terminal coupled to a periodic pulse source and its reset input terminal coupled to the output of the comparator may have its complementary output used as the timing signal source to the switch, with the normal output of the flip-flop providing the delayed signal. Alternatively, a pair of comparators may be provided, each comparator comparing the RC circuit voltage to a different voltage from different points on the voltage dividing circuit, with the comparator outputs and the switching signal being combined in a logic circuit to obtain the delayed signal.

Signal delay generating circuit

A brushless d.c. motor includes a plurality of Hall elements 1-3 for detecting the relative positions of the rotor and stator poles, a comparator circuit 103 responsive to a bipolar input control signal A for generating an output signal B proportional to the absolute magnitude of signal A and an output signal D as a function of the polarity of signal A, a timing signal generator 104 for generating output signals E timed in relation to the Hall element outputs F and having a phase sequence in response to signal D, and a reversible current supply circuit 105 for driving a set of Y-connected stator windings 101 with currents C having a magnitude proportional to signal B and a phase sequence in accordance with signal E.

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Yamanashi, Japan

Norikazu Fujie