Sandisk Technologies Inc.

Norihiro Kamae

Yosuke Kato

Minoru Yamashita

Biju Manuel

Methods for improving read time performance and energy consumption when reading multiple pages within a memory block by dynamically skipping or accelerating unselected word line discharge cycles are described. In some cases, a controller or one or more control circuits in communication with word lines and bit lines associated with a memory block may detect that a read command or instruction for reading a second page within the memory block has arrived prior to the word line discharge phase associated with reading a first page within the memory block, and in response, the controller may skip the discharge cycle for unselected word lines within the memory block prior to reading the second page and initiate the next page read for the second page after a partial discharge period of time.

Word line discharge skip for faster read time

A static timing analysis controller includes a feedback loop identification module that identifies invariable flip flop feedback loops of an integrated circuit design, and adds the identified feedback loops to false path lists. The static timing analysis controller then performs timing update operations and identifies hold violations based on the invariable flip flop feedback loops included in the false path list. In turn, the static timing analysis controller identifies reduced or less pessimistic numbers of hold violations, resulting in fewer buffers added to the integrated circuit design.

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Yokohama, Japan

Norihiro Kamae