Kabushiki Kaisha Toshiba

Norihiko Tsuchiya

Yukihiro Ushiku

Yoshiaki Matsushita

Atsushi Yagishita

Hiroshi Matsushita

Junji Sugamoto

Katsujiro Tanzawa

Masanori Numano

Atsuko Kubota

Shuichi Samata

Moriya Miyashita

Kaori Umezawa

Katsuya Okumura

Satoshi Inaba

Hajime Nagano

Hiroaki Yamada

Soichi Nadahara

Masao Iwase

Tsunetoshi Arikado

Shinichi Nitta

Yasunori Okayama

Minoru Takahashi

Masakatu Kojima

Yuso Udo

Hiroyuki Kamijou

Yoshihiro Ueno

Hiroyasu Kubota

Tsunehiro Kita

Yoshiki Hayashi

Takanobu Kamakura

Mokuji Kageyama

Youko Toyomaru

Makiko Wakatsuki

A semiconductor wafer has a bevel contour formed along the periphery thereof, products formed on the wafer, and an ID mark formed on the bevel contour. The ID mark shows at least the properties, manufacturing conditions, and test results of the products.

Semiconductor wafer with ID mark, equipment for and method of manufacturing semiconductor device from them

A method of inspecting a semiconductor wafer, comprises removing a device structure film on the semiconductor wafer with a chemical solution to expose a crystal surface of the semiconductor wafer; coating a protected area, which is a part of the crystal surface of the semiconductor wafer, with a mask material for protecting the crystal surface of the semiconductor wafer; etching the semiconductor wafer selectively, thereby making a crystal defect in a non-protected area, which is a part of the crystal surface of the semiconductor wafer that is not coated with the mask material, appear after the crystal surface is coated with the mask material; removing the mask material after the selective etching; carrying out quantitative measurement of the protected area and the non-protected area using an optical defect inspection apparatus or a beam-type defect inspection apparatus; and calculating the number of crystal defects of the semiconductor wafer base on the result of the measurement.

Method of inspecting semiconductor wafer

A treatment method of a semiconductor wafer includes treating the semiconductor wafer in a first solution having at least one kind of an oxidative acid and an oxidizing agent and treating the semiconductor wafer in a second solution having at least one of HF and NHF.

Semiconductor wafer treatment method, semiconductor wafer inspection method, semiconductor device development method and semiconductor wafer treatment apparatus

A control system for a manufacturing process includes an inspection tool inspecting a dislocation image in semiconductor substrate processed by manufacturing processes; an inspection information input module configured to acquire the inspected dislocation image; a process condition input module acquiring process conditions of the manufacturing processes; a structure information input module acquiring structure of the semiconductor substrate processed by target manufacturing process; a stress analysis module calculating stresses at nodes provided in the structure, based on target process condition and the structure; an origin setting module providing origins at positions where stress concentration having stress value not less than reference value is predicted; a dislocation dynamics analysis module calculating dislocation pattern in stress field for each position of the origins; and a dislocation pattern comparison module comparing the dislocation pattern with the inspected dislocation image so as to determine whether the target manufacturing process is critical manufacturing process.

System and method for controlling manufacturing processes, and method for manufacturing a semiconductor device

A method for evaluating an SOI layer on an insulating film disposed on a base substrate so as to construct an SOI substrate, includes: measuring a first diffraction intensity distribution of an X-ray beam corresponding to an incident angle formed with the X-ray beam and a front surface of the SOI substrate by irradiating the X-ray beam onto the base substrate; measuring a second diffraction intensity distribution of the X-ray beam for the incident angle formed with the X-ray beam and the front surface of the SOI substrate by irradiating the X-ray beam onto the SOI layer; determining an evaluation diffraction peak corresponding to the SOI layer from the first and the second diffraction intensity distribution; and observing an X-ray topograph by irradiating the X-ray beam on the SOI layer with a second incident beam angle of the evaluation diffraction peak.

Method for evaluating an SOI substrate, evaluation processor, and method for manufacturing a semiconductor device

A semiconductor substrate having a shallow trench isolation (STI) structure and a method of manufacturing the same are provided, i.e., an isolation substrate in which grooves are selectively formed at predetermined locations of the semiconductor substrate and oxide films using organic silicon source as material are buried in the grooves as buried oxide films. The present invention is characterized in that the buried oxide films are annealed at a predetermined temperature within the range of 1100 to 1350&#xb0; C. before or after planarization of the semiconductor substrate such that ring structures of more than 5-fold ring and ring structures of less than 4-fold ring are formed at predetermined rates in the buried oxide films. The above annealing allows stress of the oxide film buried in the grooves to be relaxed. Hence, the generation of dislocation is suppressed.

Method of manufacturing a substrate having shallow trench isolation

A defect-position identifying method for a semiconductor substrate comprises the steps of: forming at least three reference points on a semiconductor substrate; detecting the reference points and a defect on the semiconductor substrate by means of a first evaluating system, which is provided for evaluating the defect on the semiconductor substrate, to measure coordinate values of the reference points and the defect in a system of coordinates of the first evaluating system; detecting the reference points on the semiconductor substrate by means of a second evaluating system, which is provided for evaluating the defect on the semiconductor substrate, to measure coordinate values of the reference points in a system of coordinates of the second evaluating system; determining an affine transformation for transforming the system of coordinates of the first evaluating system to the system of coordinates of the second evaluating system on the basis of the coordinate values of each of the reference points in the first and second evaluating systems; and identifying the position of the defect in the system of coordinates of the second evaluating system on the basis of the determined affine transformation and the coordinate values of the defect in the system of coordinates of the first evaluating system. Thus, it is possible to precisely identify the position of the defect.

Defect-position identifying method for semiconductor substrate

The average density and scattered light intensity or the average density and average size of void defects contained in a surface region in a predetermined depth of a semiconductor wafer sample are measured. An ingot whose a semiconductor wafer sample satisfies D.times.Is.ltoreq.a predetermined value between the measured average density D and scattered light intensity Is or satisfies D.times.L.sup.3 .ltoreq.fixed value between the measured average density D and average size L is extracted and wafers cut from the ingot are annealed. The semiconductor wafers having few residual defects in a surface region wherein devices are to be formed can be obtained.

Semiconductor wafer and method of manufacturing the same

A semiconductor substrate having a shallow trench isolation (STI) structure and a method of manufacturing the same are provided, i.e., an isolation substrate in which grooves are selectively formed at predetermined locations of the semiconductor substrate and oxide films using organic silicon source as material are buried in the grooves as buried oxide films. The present invention is characterized in that the buried oxide films are annealed at a predetermined temperature within the range of 1100 to 1350.degree. C. before or after planarization of the semiconductor substrate such that ring structures of more than 5-fold ring and ring structures of less than 4-fold ring are formed at predetermined rates in the buried oxide films. The above annealing allows stress of the oxide film buried in the grooves to be relaxed. Hence, the generation of dislocation is suppressed.

Substrate having shallow trench isolation

In an extremely thin hetero-epitaxial growth film less than 1 .mu.m, the thin film can be grown at high precision by controlling the growth conditions. The method of growing a thin film on a semiconductor substrate comprises the steps of: forming a semiconductor thin film on a surface of a semiconductor substrate; allowing X-rays to be incident upon the thin film now being grown; measuring fluorescent X-rays emitted from the thin film now being grown in accompany with the application of the X-rays; and controlling growth conditions of the thin film on the basis of the measured values.

Method of growing thin film on semiconductor substrate and its

Element isolation technique for LSIs having a fine pattern of sub-micron class or finer. A high strained region doped with impurities at a high concentration is formed under, and remote from, a buried insulating material (dielectrics) layer for element isolation. With this buried dielectrics element isolation (BDEI) structure, since the high strained layer exists just under the buried dielectrics layer, crystal defects generated near the buried dielectrics layer due to strain caused by a difference of thermal expansion coefficient between a semiconductor layer and the buried dielectrics layer, are moved toward the high strained layer. Accordingly, the crystal defects do not reach an active region where active elements are formed, so that leakage current in the p-n junction formed in the active layer can be advantageously reduced.

Dielectrically isolated substrate and method for manufacturing the same

Provided is a process for producing a semiconductor silicon wafer by which an intrinsic gettering effect can be improved and at the same time the top side can be made free from faults. A silicon ingot is produced and sliced to obtain silicon wafers. Then, a polycrystal silicon depositing film is formed on one side of a silicon wafer, which is subjected to a heat treatment in an inert gas, a reducing gas or a mixture thereof to discharge oxygen from the vicinity of the other side. Alternatively, after discharging oxygen from the silicon wafer by a heat treatment, a polycrystal silicon depositing film may be formed on one side of the silicon wafer.

Semiconductor silicon wafer and process for producing it

A semiconductor device has a semiconductor substrate having a groove, and a semiconductor element formed in a surface region of the semiconductor substrate. A substance having a thermal expansion coefficient different from the semiconductor substrate is embedded in at least a portion of the groove, a crystal defect is generated from the region near the bottom of the groove in the semiconductor substrate, thereby alleviating stress and strain in other regions of the semiconductor substrate, such that such regions cannot generate crystal defects in a region necessary for a circuit operation of the semiconductor element of the surface region.

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Tokyo, Japan

Norihiko Tsuchiya