Hitachi, Ltd.

Hitachi Engineering Co., Ltd.

Other

Hitachi Microcomputer Engineering, Ltd.

Norihiko Sugimoto

Shunji Inada

Takuji Hamada

Shigeo Kuboki

Nobuhiro Hamada

Masahiro Ueno

Yoshinori Ohkura

Katsuhiko Yoneda

Kinshirou Oonishi

Kazuhisa Inada

Toshihiko Tominaga

Ikuro Masuda

Naoki Ogawa

Masakazu Okada

Tomoaki Aoki

Ryozo Yoshino

Mitsuhiro Yamaga

Takeshi Harakawa

Toshiyuki Murakami

Kazunori Nakamura

Seiji Kamada

Yoshinori Okura

Eiki Kondoh

Jinichi Sakurai

Nagatoshi Usami

Toshiyuki Katayama

Masumi Nawa

Syunji Inada

A system for transmitting data in high precision by restricting a delay in data transmission time includes a hub. The hub receives through the transmission media a data frame transmitted from a communication device that has a transmission request among a plurality of communication devices, and relays the received data frame to a destination communication device based on a destination address included in the received data frame.

Data transmission method and system for hub-based network

In a data communication adapter apparatus for a digital data communication connected between a signal transmission path for transmitting both receive data and transmit data, and a host processor unit for producing frame data to output the frame data therefrom, an internal host bus is newly employed in the data communication apparatus irrelevant to the employment of a CPU dedicated bus, and the transmission/reception data generated and interpreted by the host processor is transferred via the internal host bus, a bus interface, and a system data bus between a transmission memory or a reception memory and a buffer memory. Furthermore, a reception memory (host dedicated reception memory) for storing only the reception data to be interpreted by the host processor is separately provided with another reception memory (CPU dedicated reception memory) for storing only the reception data to be interpreted by a CPU, one reception data to be interpreted by the CPU is once transferred from the transmission/reception control unit to the CPU dedicated memory and thereafter read out via the CPU dedicated bus under the control of the CPU, and the other reception data to be interpreted by the host processor is one stored in the host dedicated reception memory and then read out via the internal host bus and bus interface under the control of the host processor.

Data communication adapter and data communication terminal apparatus for

A system for transmitting data in high precision by restricting a delay in data transmission time, and including a hub. The hub receives through transmission media a data frame transmitted from a communication device that has a transmission request among a plurality of communication devices, and relays the received data frame to a destination communication device based on a destination address included in the received data frame.

A data transmitting/receiving apparatus comprises a master clock signal and a slave clock signal which differ in phase with each other according to a basic clock signal. Serial data is input according to the produced master clock signal or slave clock signal, a protocol process is applied to the input serial data, and the serial data subjected to the protocol process is output according to the master clock signal or the slave clock signal. A start delimiter detecting signal is generated when a start delimiter indicating the first frame is detected in the input serial data and phases are exchanged between the master clock signal and the slave clock signal when there arises a shift on a bit boundary of the serial data when the start delimiter detecting signal is generated. The serial data is output according to the master clock signal or the slave clock signal having their phases exchanged with each other, thus the serial data is transmitted without delay despite a shift arising on the bit boundary of the serial data.

Clock generating apparatus, data transmitting/receiving apparatus and

In a method of controlling a buffer device, data are received from a communication transmission line, and the received data are written in a buffer device at a predetermined write rate. The data written from the buffer device are started to be read at a predetermined read rate. The quantity of data written and accumulated in the buffer device is compared with a predetermined threshold for a predetermined period from the read start point of time. When it is found as the result of comparison that the quantity of accumulated data is the same as or less than the threshold, the buffer device performs only write of data from the communication transmission line and, when the quantity of accumulated data is larger than the threshold, the buffer device performs both write of data from the communication transmission line and read of data out of the buffer device at the same time during a predetermined period.

Data communication system

An identification code for identifying a data frame is added to the data frame transmitted from a station. When a bridge which interconnects transmission paths is to relay the data frame, it compares the identification code with the identification code stored in a memory under a condition of activation of a timer and relays only the data frame having a different identification code. The timer is activated by a first-coming data frame and deactivated after a predetermined time interval.

Method and apparatus for controlling data communication on a

In a program control apparatus with a program ROM which forms sequence control signals for executing various control actions according to specified conditions, a memory circuit is provided which is activated during a particular operation mode to successively store information corresponding to the external conditions and also information on times taken by the operation sequence of the program control apparatus.

Program control apparatus incorporating a trace function

In each node accommodated in a token-ring network system, a storage unit for storing priority levels is constituted by a plurality of flip-flops which provide bit positions of the same number as that of grades of the priority level. When storing a value of priority level which is higher than a value of priority level stored in the storage unit, the corresponding flip-flop of the storage unit is set. Two priority encoders connected to the output of the storage unit detect, from data of priority level stored in the storage unit, first and second priority levels and load then on registers, respectively. In accordance with the contents of the registers, the corresponding flip-flop of the storage unit is rest, when each node detects a value of priority level stored in the storage unit.

Method of and apparatus for storing priority levels in token-ring

Multi-network system for transmitting data among a plurality of stations, each of which is connected to one of transmission lines, a plurality of said transmission lines being connected with each other through bridge stations, in which the numbers of the transmission lines, with which in final destination station and the source station are connected respectively, are set as the destination address and the source address in the data frame to be sent; in the case where the bridge station receives a frame of data to be relayed between different transmission lines, the bridge station identifies the relay by the destination address, stores the data frame in a memory means storing data, which should be sent by the bridge station itself; attaches to the data to be relayed a flag, in which the relay indication is set, and to the data not to be relayed a flag, in which the relay indication is not set; and when the data are sent by said station, in the case where the flag attached to the data represents the relay, the data frame which has been received is sent without any change.

Multi-network system

A decoding circuit is operative to decode a differential Manchester code consisting of four symbols 'J', 'K', '1' and '0' each composed of two consecutive signal elements. For detection of the symbol 'J' and consequent determination of the symbol boundary, the decoding circuit has a circuit configuration which takes advantage of the fact that the symbol 'K' immediately follows the symbol 'J' and three consecutive signal elements, two of which are included in the symbol 'J' and one of which is for a symbol immediately preceding the symbol 'J', have the same polarity. To prevent an error that a second occurrence of the symbol 'J' is detected after completion of detection of the symbol 'J', the decoding circuit has an additional circuit configuration which inhibits the detection of the symbol 'J' until the symbol '0' or the symbol '1', for example, is detected.

Decoding circuit

A symmetric type loop communication system having no master station, in which a plurality of control stations connected to a loop communication path each have a timer with its set time different from each other control station. The timer of a station is reset when a transmission right signal (GA signal) from another control station is received. On the other hand, a GA signal is sent out to another control station together with a message frame when the timer thereof has counted to a predetermined state.

Symmetry type loop communication system

In a plant control system, a transmission channel includes loop transmission lines arranged in duplex. Equivalently connected to this transmission channel are a plurality of one-loop controller stations, a backup station backing up a disabled one of the plural controller stations and a display station for displaying the status of the controller stations and the backup station. Each of the controller stations, backup station and display station includes a built-in microcomputer. Each of these stations includes also a transmission interface circuit and a self-diagnostic circuit. The transmission interface circuit in each station selects one of the transmission lines for data transmission between its own station and the others. The self-diagnostic circuit in each station detects the presence of failure of normal operation of its own station and disconnects the disabled station from the transmission line, so that the other stations may not be adversely affected by the disabled station.

Plant control system

The disclosure is concerned with a method of and apparatus for magnetic information recorded on a magnetic recording medium such as a thin magnetic card by the NRZ-I method. The omission of a timing pulse signal is sensed through a detection of two successive timing pulse signals of the same direction of magnetic inversion. As the omission of the timing pulse signal is detected, the missing timing pulse signal is corrected and the data corresponding to the corrected timing pulse signal is temporarily memorized. The memorized data is corrected when an omission of the data signal is detected later.

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Katsuta, Japan

Norihiko Sugimoto