Ntt Electronics Corporation

Megachips Corporation

Mitsubishi Power, Ltd.

Norihiko Nagai

Yasuhiro Yamada

Takashi Matsumoto

Hiromu Hasegawa

Akira Okamoto

Hiroaki Kishida

Nobuyuki Takasu

Mayumi Okumura

Shigeru Kasuya

A seal member assembly structure and assembly method, a seal member, and a gas turbine, wherein, in a state where first flange parts provided on a combustor transition piece are fitted into first fitting parts provided in seal members, protruding parts provided on the first flange parts are inserted into recessed parts provided in the first fitting parts.

Seal member assembly structure and assembly method, seal member, and gas turbine

A first look-up table () outputs a result of dividing a horizontal component of a pixel address in the block by number of pixels in a horizontal component of the cell. A second look-up table () outputs a result of dividing a vertical component of a pixel address in the block by number of pixels in a vertical component of the cell. A third look-up table () outputs a residue as a result of dividing a horizontal component of a pixel address in the block by number of pixels in a horizontal component of the cell. A fourth look-up table () outputs a residue as a result of dividing a vertical component of a pixel address in the block by number of pixels in a vertical component of the cell. The output values of the first and second look-up tables () are addresses of the cell for burst access to the memory. The output values of the third and fourth look-up tables () are used as pixel addresses in the cell.

Memory access device

An image processing device carries out processing in a processing unit of 3-blocks. Data of 192(=64&#xd7;3)-pixels is required in the processing of 3-blocks. This is an amount of data corresponding to 16-cells. When 3-blocks and 16-cells are arranged along an scanning direction of an image, both ends of them in the scanning direction are aligned.

Image processing device for improved access efficiency

A quantization step determination part inputs an evaluation value (ACT_MB) indicating the dispersion in a macroblock and its average value (ACT_PIC). A subtracter obtains the difference between these values, and a multiplier multiplies the difference by r(&#x3c;1) to obtain a weighting value. Next, an adder adds the weighting value to an average quantization step value of source data, and finally a multiplier multiplies the sum by a step value adjustment factor &#x3b1; (&#x3e;1) to obtain a converted quantization step value (Qstep_AVC). This optimizes a bit allocation in accordance with an Activity value of the macroblock, to thereby improve the quality of image.

Transcoder and coded image conversion method

An object of the present invention is to provide a binary arithmetic coding device that allows real-time processing with a higher image quality. At a timing at which a ternary data string for a target bit is outputted, an updated coding range width and an updated range width of less probability are outputted. For that reason, while a binary conversion unit () and an f value retention processor () convert the ternary data string into a binary data string to output a coded bit, a binary arithmetic re-normalization unit () is allowed to perform a processing of binary arithmetic coding for the next bit.

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Kanagawa, Japan

Norihiko Nagai