Mitsubishi Denki Kabushiki Kaisha

Norihiko Kotani

Masato Fujinaga

Tatsuya Kunikiyo

Katsumi Eikyu

Kenichiro Sonoda

Satoru Kawazu

Tsuyoshi Yamano

Kiyoshi Ishikawa

Mikio Ikeda

A method of manufacturing a semiconductor device wherein the device is manufactured according to extracted process parameters. The process parameters are extracted as a set of optimum process parameters which satisfy an intended specification using process functions. The process functions describe a characteristic of the semiconductor device, and are determined using experimental values and/or simulated values. The process parameters may then be transmitted online to a factory.

Method of simulating semiconductor manufacture with process functions

A semiconductor device for switching comprises a semiconductor substrate (10), three conductive regions (14, 16, 20) for providing a path for electrons to or from desired locations of the semiconductor substrate (10) formed at locations spaced apart on the surface of the semiconductor substrate (10, 28), a device (22, 24) for causing a current between the first and second conductive regions (14, 16), and a device (18) for forming electric field for diverting the caused current to the third conductive region (20). Since the current flowing to the first and second conductive regions (14, 16) is diverted to the third conductive region (20), switching operation between the first and second conductive regions (14, 16) is implemented.

Semiconductor device having electrode for collecting electric charge in

A shape simulation method includes dividing an analysis volume into a plurality of cells, defining an initial volume ratio of the volume of a substance in a cell to the volume of the cell for each cell, computing the in flow and the out flow of the substance in each cell every time a very small time period elapses, computing a volume ratio for each cell from the initial volume and the in flow and out flow of the substance every time a very small time period elapses, and simulating the surface shape of the substance with the cells having a volume ratio of a predetermined value.

Method of describing a surface of an object after processing

A method of logic simulation includes the steps of reading delay time of a logic element itself calculated in advance, converting output logic value of the logic element to a voltage value, forming a circuit equation based on connection information of an output impedance circuit of the logic element, calculating a voltage value at an arbitrary node of the output impedance circuit by solving the circuit equation, and converting a voltage value of an input node of a logic element of the succeeding stage to a logic value.

Method of logic circuit simulation

A system for managing successive processes which are to be performed on raw articles in a production line for producing finished articles. The system comprises a process managing block for receiving data on preceding processes which have already been performed on partially finished articles on the production line and delivers conditions for the processes which are to be subsequently performed on the production line, a data accumulation block for statistically accumulating data concerning preceding processes carried out on the production line, and a simulation block for determining optimum conditions for the processes which are to be subsequently performed based on the data concerning the preceding processes which have been actually performed on the production line and the statistical data accumulated on the data accumulation block. The simulation block provides optimum process conditions to the process managing block. Any deviation of the characteristics of the unfinished product caused by preceding processes are compensated for by appropriately varying the conditions of the subsequent processes whereby finished articles of high quality are produced with a high yield.

Method for managing production line processes

A system for managing successive processes which are to be performed on a semiconductor wafer in a production line for producing a semiconductor device. The system comprises a process managing block for receiving data on preceding processes which have already been performed on the semiconductor wafer on the production line and delivers conditions for the processes which are to be subsequently performed on the production line, a data accumulation block for statistically accumulating data concerning preceding processes carried out on the production line, and a simulation block for determining optimum conditions for the processes which are to be subsequently performed based on the data concerning the preceding processes which have been actually performed on the production line and the statistical data accumulated on the data accumulation block. The simulation block provides optimum process conditions to the process managing block. Any deviation of the characteristics of the unfinished product caused by preceding processes are compensated for by appropriately varying the conditions of the subsequent processes whereby semiconductor products of high quality are produced with a high yield.

Method for producing semiconductor devices

A topography simulation method for simulating a surface topography of a material object material while a surface of material object is being processed, as by etching or a deposition, includes the steps of dividing a region to be analyzed, in a surface including the advancing direction of processing, into a plurality of regions in a grid in accordance with the surface topography of the material object by approximating the movement of the processed surface of the material object as the movement of an equi-concentration surface determined by the diffusion of particles, establishing diffusion coefficients for the respective regions on the basis of the surface processing velocity, calculating equi-concentration surfaces by the Diffusion equation, and assembling the obtained equi-concentration surfaces to produce a three-dimensional surface topography.

Topography simulation method

A topography simulation method enables estimation of the three-dimensional shape of a surface of a workpiece where material removal by a predetermined process takes place. This simulation method includes the steps of dividing a region of the workpiece to be removed into a plurality of partial regions; setting a diffusion coefficient for each partial region with a diffusion component contributing to material removal, and calculating a contour surface of the concentration of the diffusion component by a process which employs modified diffusion equations. The contour surface obtained the surface after material removal.

The disclosed MOS transistor includes a channel region formed of a lightly doped semiconductor layer disposed in a surface portion of a heavily doped semiconductor layer subsequently disposed on a lightly doped semiconductor substrate. The channel region may be of the identical or opposite conductivity type to the heavily doped semiconductor layer that has the same type conductivity as the substrate. Also the channel region may be of an intrinsic semiconductive material. A source and a drain region may be disposed in the lightly or highly doped layer. Alternatively the source and drain regions may reach the substrate.

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Itami, Japan

Norihiko Kotani