Rca Inc.

Norbert W Brackelmanns

John M Neilson

Carl Franklin Wheatley, Jr

Ramon Ubaldo Martinelli

Paul H Robinson

William Hulstrunk

Raymond T Ford

A MOSFET device comprises a semiconductor wafer which includes a drain region of first conductivity type contiguous with a wafer surface. A diffused body region of second conductivity type extends into the wafer from the wafer surface so as to form a body/drain PN junction which has a polygonally-shaped intercept at the wafer surface. A plurality of source regions of first conductivity type extends into the wafer from the wafer surface within the boundary of the body region. The source regions define a plurality of channel regions, a contact area, and at least one shunt region at the surface of the body region. Each shunt region extends from the contact area to one of the corners of the body/drain PN junction polygonal intercept. A source electrode contacts the body region contact area and each of the source regions adjacent thereto.

MOSFET with reduced bipolar effects

A VDMOS device comprises a semiconductor wafer having a major surface with a first conductivity type drain region thereat. An array of second conductivity type body regions, spaced from each other by distance D, is diffused into the drain region from the first surface. The body regions each include a relatively high conductivity supplementary body region and a first conductivity type source region diffused therein from within the first surface boundary thereof. The spacing between each source region and the drain region defines a channel region at the first surface. A source electrode contacts the source and body regions and an insulated gate electrode overlies each channel region. A gate bond pad, in direct contact with the gate electrode, overlies a second conductivity type gate shield region and is insulated therefrom. The gate shield region is contiguous with the drain region and is spaced from the neighboring channel regions by distance D. The gate shield region includes a plurality of contact areas proximate to the periphery thereof and a plurality of relatively low conductivity portions disposed between the contact areas and the drain region. The source electrode ohmically contacts these contact areas.

Gate shield structure for power MOS device

A vertical MOSFET device includes a major surface having an active, gate-controlled portion adjacent to an inactive portion. A gate-controlled perimeter channel is disposed at the boundary between the active and inactive portions.

MOSFET with perimeter channel

The preferred embodiment of the invention disclosed herein is a transistor that includes a body of semiconductor material having first and second major surfaces. An emitter doped with atoms of one conductivity type is formed in the body and extends into it from the first major surface. The emitter geometry is such that it has hub portion and finger portions. Within the closed area formed by the hub portion of the emitter, there is provided a central region doped with atoms of the same conductivity type as the emitter and this central region is slightly spaced from the inner periphery of the hub portion. Over the central region and the space between it and the inner periphery of the emitter is provided an oxide layer over which electrode metallization is deposited so as to be in contact with the hub portion but spaced from the central region.

Fast switching transistor

A high-current, high-voltage semiconductor device is fabricated on a metallurgical grade substrate of a first conductivity type by first growing an epitaxial layer of the first conductivity type on the substrate and then fabricating a semiconductor device thereon designed for high-current, high-voltage applications.

Growing community of inventors

Ironia, NJ, United States of America

Norbert W Brackelmanns