Samsung Electronics Co., Ltd.

Noh-byung Park

Shung-hyun Cho

Hee-Duck Park

Shung-Hyun Cho

Sung-soo Kim

Joon-Hee Lee

Sang-Jin Lee

Ji-hoon Kim

Jae-heung Lee

In-hwan Kim

Ju-han Lee

Ho-jeong You

Jun-hae Choi

Seung-gi Chang

Chang-ho Lee

Seung-Beom Choi

Young-gyoo Choi

Jong-Sung Choi

Jung-Gyu Lim

Jeong-Woo Hong

Sung-un Park

Ju-seo Park

Provided is an apparatus and method of displaying power line communication (PLC) channel information. The apparatus for displaying PLC channel information includes a channel information determining unit which performs channel estimation of a PLC channel, and, based on the channel estimation, determines channel information on the PLC channel including a bandwidth of the PLC channel which is available for a user in a PLC network; and a channel information displaying unit which displays the channel information to the user.

Apparatus and method of displaying power line communication channel information

An analog/digital signal processor outputting analog input signals without eliminating copy protection signals from analog input signals, analog input signals having been subjected to copy protection process such as macrovision without adding complicated processes. The analog/digital signal processor for receiving input signals and outputting received input signals to a predetermined appliance through an analog or a digital communication unit, includes: a control unit determining whether the input signals are digital or analog signals and controlling a processing path and an output path of the input signals in accordance with the determination result; and a switching unit switching the input signals to the analog or the digital communication unit under the control of the control unit. When the input signals are analog signals, the control unit sets the processing path of the input signals to the switching unit and the switching unit switches the input signals to the analog communication unit.

Analog/digital signal processor and analog/digital signal processing method

A computer system includes: a host unit, a power management system, a data backup power supply, a switching mode power supply, an auxiliary storage unit and a memory. The power management system generates a hibernation signal when an event is not generated from peripheral devices for a predetermined time period, a battery driving signal is output from the data backup power supply due to a power-off operation, or a command word is generated in accordance with performing a scheduled program. The host unit backs up the current operational environment and data in the auxiliary memory storage unit according to the hibernation signal, and outputs a powerdown command word so that the power management system interrupts the system power supply by outputting a main power cut-off signal or outputting a battery power cut-off signal according to the powerdown command word. The power management system resumes the power supply by outputting a power supply signal when a WAKE-UP signal in generated while the power is interrupted. When power is resumed, the host unit retrieves the backed up data and the work environment, identifies the source outputting the WAKE-UP signal, and then performs the corresponding operation.

Computer hibernation system for transmitting data and command words

A method and device for controlling a CPU stop clock interrupt of a computer system. The device includes an idle detector and a control processor. A CPU having a stop clock interrupt mode receives a stop clock interrupt signal and initiates and terminates the stop clock interrupt mode according to a logic state of the stop clock interrupt signal. The control processor receives a signal representing an idle condition of the computer system from the idle detector, an alternate signal for idle detector control of the CPU stop clock interrupt mode, and a control signal for forcing the CPU to resume a normal mode by clearing the stop clock interrupt mode. The idle condition can be defined by a computer user according to a selection of predetermined times during which no user inputs are received by the computer system. The method includes monitoring the idle condition signal, monitoring the alternate signal for idle detector control of the stop clock interrupt mode and monitoring the control signal for forcing the CPU to resume a normal mode by clearing the stop clock interrupt mode. The stop clock interrupt signal is output having a logic state corresponding to the logic combination of the monitored signals.

System for controlling stop clock interrupt mode according to user

A hibernation system of a computer employing option cards responds to a hibernation interrupt signal generated by a power management system in case of power failure or a period of non-use. In response, an operation controller backs up the present data and outputs a power supply cut-off signal. A basic input/output system calls a software interrupt for storing data when a hibernation suspension function is performed by the operation controller, and calls a software interrupt for restoring data when a hibernation resume function is performed. A plurality of option cards mounted on extension slots connected to the system bus patch the called software interrupt, and either perform an interrupt routine for storing option card register data and chipset data for initialization, or alternatively perform initialization according to stored chipset data and restore the register to a previous state, thereby performing a hibernation function responsive to every option card without overloading the basic input/output system even if the number of the mounted option cards is increased.

Option card hibernation system

A network hibernation system for use with a computer connected to a local area network. (LAN) which is capable of retaining both data from the computer and data from the network environment created in connection with the LAN in the event of a power failure and also in the event that the computer is idle for a predetermined time period. Upon the restoration of power, the states of the computer and network hibernation system are resumed to the point before the occurrence of the power failure or the idle period. The system includes a network interface for connecting the computer to the local area network; a power controller connected to a data bus, for generating a time-out signal when the computer is in a non-use state during operation of the computer; a power supply connected to the data bus, for generating a power interrupt detection signal upon abrupt termination of a main power source to provide back-up power to the computer system for backing data of the computer in a network environment, and for terminating the back-up power upon reception of a power interrupt signal; a supplemental memory for storing data of the computer in the network environment; a system controller connected to the data bus, for controlling data of the computer in the network environment to be stored in the supplemental memory, for generating the power interrupt signal after the data of the computer in the network environment are stored in the supplemental memory in response to either the time-out signal or the power interrupt detection signal to set the computer in a network hibernation state, and for recovering stored data and restoring the computer in the network environment when the main power source is re-supplied to the computer; and a main memory for storing network hibernation information for the system controller to determine whether the computer is in the network hibernation state.

Network hibernation system for suspending and resuming operation of

A peripheral device input-initiated resume system for a combined hibernation system and back-up power supply for a computer comprises a keyboard controller for inputting an appropriate signal to the operating condition based on the key selected by a user, a power management system for outputting a wake-up signal if the signal is inputted from the keyboard or other input devices, a data back-up power unit for supplying DC voltage in case the power is cut-off suddenly or a user does not use the computer for a predetermined time, a power supplying unit in which a switching-mode power supply SMPS converts the external source AC power at line voltage into DC power at a desired voltage and supplies that power to each device on the main board of the computer, thereby retrieving the previous work again by cutting off power of all devices, once the power is off or when a user does not use the computer for a predetermined time, and supplying the additional power only to the MICOM(Micro Computer) or keyboard controller in the state that a hibernation mode is performed. Then the system repeats supplying power if a signal is input again by a user, and consequently helps a user to use the computer more easily with this hibernation state by retrieving the work to the previous state.

Peripheral device input-initiated resume system for combined hibernation

An electrical coupling configured to prevent voltage surges during coupling and uncoupling. A plurality of ground terminals and a plurality of signal terminals are arrayed to open onto an exterior mating surface of an electrical coupling such as a D-sub type electrical connector, with the distal ends of the ground terminals protruding outwardly farther from their corresponding pinholes towards the exterior mating surface than the distal ends of the signal terminals. These configurations prevent the input and output controlling circuit stages from being disabled by the occurrence of noise superimposed upon the power lines or momentary surges of voltage generated while the system is temporarily ungrounded during coupling, with an assurrance that during coupling, the ground terminals establish electrically conducting paths before the signal terminals. These configurations are suitable for printer cables, repeater cables and connector cables of other devices.

Surge voltage preventing D-sub connector

In a mono/stereo input circuit for use in an audio equipment, and more particularly in a circuit for automatically recognizing and receiving mono/stereo audio signals, although a mono connector is inserted into a stereo jack, such an insertion of the mono connector is automatically recognized and then a stereo circuit can operate as a form of a mono circuit. The circuit for automatically recognizing and receiving the mono/stereo audio signals utilizes a fact that one connection terminal of the jack is grounded or not according to a type of the connector such as a mono connector and a stereo connector which is inserted into the jack. Accordingly, a resistor used as a voltage generator generates a generation voltage according to such a connector recognition. Also, using a difference between the generated voltage, the analog switches are turned on or off, to obtain a mono or a stereo audio signal processing circuit according to a type of the inserted connector. Accordingly, the present invention has an effect that a type of the inserted connector can be automatically recognized, and an external source or a microphone input circuit can operate without having any inconveniences to change a selector switch each time when a user exchanges a stereo input signal with a mono input signal.

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Seoul, South Korea

Noh-byung Park