Centre National De La Recherche Scientifique

Universidad De Granada

Noel Rodriguez

Sorin Ioan Cristoloveanu

Francisco Gamiz

The invention relates to a memory cell consisting of an isolated MOS transistor having a drain (), a source () and a body region covered with an insulated gate (), in which the body region is divided through its thickness into two separate regions () of opposite conductivity types extending parallel to the plane of the gate, the body region closest to the gate having the opposite conductivity type to that of the drain/source.

RAM memory cell comprising a transistor

A memory cell formed of a semiconductor nanorod having its ends heavily doped to form source and drain regions and having its central portion including, between the source and drain regions, an N-type region surrounded on a majority of its periphery with a quasi-intrinsic P-type region, and wherein the P-type region itself is surrounded with an insulated gate.

Growing community of inventors

Armilla, Spain

Noel Rodriguez