Canon Kabushiki Kaisha

Nobuyuki Yuasa

Hiroshi Nonoshita

Yoshihiro Terashima

An information processing device according to an embodiment of the present invention includes the following elements: a detection unit configured to detect an amount of change in position of an image data item that is displayed on a display screen; and a processing unit configured to perform image processing on the image data item in accordance with a detection result that is obtained by the detection unit, and to perform audio processing on an audio data item corresponding to the image data item in accordance with the detection result that is obtained by the detection unit.

Information processing device, control method therefor, and program

To check operation of a circuit to be checked connected to a bus to which at least one master circuit and at least one slave circuit are connected, a model is connected to a bus in place of a master circuit or a slave circuit and cause given signals to be outputted at given timing for checking the operation of the circuit to be checked. Especially, by causing various data transfer to occur at random timing by a plurality of models, it is easy to cause severer than actual conditions to take place easily, enabling to enhance efficiency of checking. For example, when checking operation of a bus arbiter, a plurality of master models are connected in place of a plurality of master circuits to cause a request of bus accessibility to be outputted from each master model at random timing to check arbitration operation of a bus arbiter.

Method for logic checking to check operation of circuit to be connected to bus

To check operation of a circuit to be checked connected to a bus to which at least one master circuit and at least one slave circuit are connected, a model is connected to a bus in place of a master circuit or a slave circuit and cause given signals to be outputted at given timing for checking the operation of the circuit to be checked. Especially, by causing various data transfer to occur at random timing by a plurality of models, it is early to cause severer than actual conditions to take place easily, enabling to enhance efficiency of checking. For example, when checking operation of a bus arbiter, a plurality of master models are connected in place of a plurality of master circuits to cause a request of bus accessibility to be outputted from each master model at random timing to check arbitration operation of a bus arbiter.

The present invention concerns an image processing device that is connectable to a general-purpose bus of a second image processing apparatus that includes a memory. An image dividing device generates divided images by dividing an original image, and stores the divided images in the memory. An image connecting device generates an original image by connecting divided images stored in the memory.

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Kanagawa, Japan

Nobuyuki Yuasa