Matsushita Electric Industrial Co., Ltd.

Matsushita Electronics Corporation

Toyo Tire Rubber Co., Ltd.

Panasonic Corporation

Nobuyuki Tamura

Keita Takahashi

Hiroyuki Doi

Yasushi Okuda

Masafumi Doi

Mizuki Segawa

Ken Suzuki

Katsuhiro Ootani

Takehisa Kishimoto

Shunichi Shinobu

A semiconductor device includes a first MIS transistor on a first active region of a semiconductor substrate, the first MIS transistor including: a first gate insulating film provided on the first active region; a first gate electrode provided on the first gate insulating film; a first stressor insulating film provided on an upper face and side faces facing in a gate length direction of the first gate electrode such that first stress acts on a channel of the first MIS transistor in the gate length direction; and a first base insulating film provided on side faces of the first gate electrode facing in a gate width direction, wherein the side faces of the first gate electrode facing in the gate width direction are not covered with the first stressor insulating film.

Semiconductor device and fabrication method thereof

A strut mount capable of reducing the weight and of intensifying the strength and having a good durability is provided. It comprises an inner cylinder, a vibration isolating base body and a pair of upper and lower brackets. The lower bracket is fabricated from aluminum alloy and includes a peripheral wall portion, a bottom wall portion and a first attachment flange while the upper bracket includes a second attachment flange and a lid wall portion. The first attachment flange has plural first through-holes for inserting plural attachment members, the second attachment flange has plural second through-holes for inserting the plural attachment members, and flange portions around the first through-holes of the first attachment flange bulge at their undersides to form respective thick-walled portions.

Strut mount

A semiconductor device includes a transistor of a first conductivity type and a transistor of a second conductivity type. The transistor of the first conductivity type includes a first gate portion formed on a first region of a semiconductor substrate, a first sidewall formed on each side face of the first gate portion, a first protecting film formed between the first sidewall and the first gate portion, and an extension diffusion layer of the first conductivity type. The transistor of the second conductivity type includes a second gate portion formed on a second region of the semiconductor substrate, a second sidewall formed on each side face of the second gate portion, a second protecting film having an L-shaped cross-section and formed between the second sidewall and the second gate portion and between the second sidewall and the semiconductor substrate, and an extension diffusion layer of the second conductivity type.

Semiconductor device and method for fabricating the same

The non-volatile semiconductor memory device has a booster including a capacitor, and a storage circuit including a storage element. The capacitor has a lower electrode, a capacitor capacitance insulating film and an upper electrode. The lower electrode of the capacitor is shaped to have an increased surface area.

Non-volatile semiconductor memory device and manufacturing method thereof

A liquid-sealed vibration-proof device capable of avoiding leakage of liquid upon press fitting of an outer cylinder is provided. An intermediate ring interposed between the outer cylinder and an antivibratory base is formed at its outer circumferential surface with two projecting streaks, the one on liquid chambers side being formed with cutouts. When the outer cylinder is press fitted to an attachment opening of a vehicle body, the liquid confined in a space enclosed between both projecting streaks can escape to the liquid chambers, so that liquid never leaks outside.

Liquid-sealed vibration-proof device

A memory transistor and a select transistor are disposed side by side on a semiconductor substrate between source/drain diffusion layers thereof, with an intermediate diffusion layer interposed therebetween. The memory transistor includes: a gate insulating film having such a thickness as to allow tunneling current to pass therethrough; a floating gate electrode; an interelectrode insulating film; and a control gate electrode. The select transistor includes a gate insulating film and a select gate electrode. Tunneling current, allowing electrons to pass through the gate insulating film under the floating gate electrode, is utilized during the removal and injection of electrons from/into the floating gate electrode. As a result, higher reliability can be attained and rewriting can be performed at a lower voltage. Also, since the select transistor is provided, reading can also be performed at a lower voltage. Improvement of reliability and rewrite and read operations at respective lower voltages are realized for a nonvolatile semiconductor memory device, in which a memory cell includes a floating gate electrode and a control gate electrode.

Nonvolatile semiconductor memory device and method for driving the same

A gate insulator film and a gate electrode are formed on an Si substrate, and a CVD insulator film is deposited thereon to cover the gate electrode. Then, arsenic ions are implanted into the Si substrate from above the CVD insulator film to form LDD layers. After sidewall spacers have been formed over the side faces of the gate electrode with the CVD insulator film interposed therebetween, source/drain layers are formed. Since the LDD layers are formed by implanting dopant ions through the CVD insulator film, the passage of arsenic ions through the ends of the gate electrode can be suppressed. As a result, a semiconductor device suitable for miniaturization can be formed, while suppressing deterioration in insulating properties of the gate oxide film due to the passage of dopant ions through the ends of the gate electrode.

Method for fabricating semiconductor device using a CVD insulator film

A memory transistor and a select transistor are disposed side by side on a semiconductor substrate between source/drain diffusion layers thereof, with an intermediate diffusion layer interposed therebetween. The memory transistor includes: a gate insulating film having such a thickness as to allow tunneling current to pass therethrough; a floating gate electrode; an interelectrode insulating film; and a control gate electrode. The select transistor includes a gate insulating film and a select gate electrode. Tunneling current, allowing electrons to pass through the gate insulating film under the floating gate electrode, is utilized during the removal and injection of electrons from/into the floating gate electrode. As a result, higher reliability can be attained and rewriting can be performed at a lower volt age. Also, since the select transistor is provided, reading c an also be performed at a lower voltage. Improvement of reliability and rewrite and read operations at respective lower voltages are realized for a nonvolatile semiconductor memory device, in which a memory cell includes a floating gate electrode and a control gate electrode.

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Osaka, Japan

Nobuyuki Tamura