Fujitsu Corporation

Fujitsu Semiconductor Limited

Fujitsu Microelectronics Limited

Nobuyuki Ohtsuka

Noriyoshi Shimizu

Yoshiyuki Nakao

Hideki Kitada

Masashi Ozeki

Hisaya Sakai

Masaki Haneda

Kuninori Kitahara

Michie Sunayama

Takahiro Tabira

Takashi Suzuki

Shinichi Akiyama

Kazuya Okubo

Hiroki Kondo

Kohki Mukai

Kouji Mochizuki

Akira Furuya

Tamotsu Owada

Hiroshi Kudo

Takayuki Ohba

Shinichi Ogawa

Yoshiki Sakuma

Tsuyoshi Kanki

Yasuo Matsumiya

Hiroshi Okamura

Kunihiko Kodama

Yoshiyuki Nakano

A semiconductor device includes a semiconductor substrate, an oxygen-containing insulating film disposed above the above-described semiconductor substrate, a concave portion disposed in the above-described insulating film, a copper-containing first film disposed on an inner wall of the above-described concave portion, a copper-containing second film disposed above the above-described first film and filled in the above-described concave portion, and a manganese-containing oxide layer disposed between the above-described first film and the above-described second film. Furthermore, a copper interconnection is formed on the above-described structure by an electroplating method and, subsequently, a short-time heat treatment is conducted at a temperature of 80&#xb0; C. to 120&#xb0; C.

Semiconductor device and method for manufacturing the same

A method for manufacturing a semiconductor device includes forming a first-conductivity-type well and a second-conductivity-type well in a silicon substrate; stacking a first high-dielectric-constant insulating film and a first cap dielectric film above the silicon substrate; removing at least the first cap dielectric film from above the second-conductivity-type well; conducting a first annealing at a first temperature to cause an element included in the first cap dielectric film to diffuse into the first high-dielectric-constant insulating film disposed above the first-conductivity-type well; after the first annealing, stacking a second high-dielectric-constant insulating film and a second cap dielectric film above the silicon substrate; removing the second cap dielectric film disposed above the first-conductivity-type well; and conducting a second annealing at a second temperature lower than the first temperature to cause an element included in the second cap dielectric film to diffuse into the second high-dielectric-constant insulating film disposed above the second-conductivity-type well.

Method for manufacturing semiconductor device

A semiconductor device includes a first conductor formed over a semiconductor device; an insulation film formed over the semiconductor substrate and the first conductor and having an opening arriving at the first conductor; a first film formed in the opening and formed of a compound containing Zr; a second film formed over the first film in the opening and formed of an oxide containing Mn; and a second conductor buried in the opening and containing Cu.

Semiconductor device having a conductor buried in an opening

Method of manufacturing a multilayer interconnection structure in a semiconductor device

(a) A recess is formed through an insulating film formed over a semiconductor substrate. (b) After the recess is formed, a temperature of the substrate is raised to 300&#xb0; C. or higher at a temperature rising rate of 10&#xb0; C./s or slower and a first degassing process is executed. (c) After the first degassing process, a conductive film is deposited on the insulating film, the conductive film being embedded in the recess. (d) The deposited conductive film is polished until the insulating film is exposed. It is possible to suppress occurrence of defects during CMP to be performed after a conductive member is deposited on the surface of the insulating film having a recess formed therethrough.

Manufacture method for semiconductor device using damascene method

(a1) A concave portion is formed in an interlayer insulating film formed on a semiconductor substrate. (a2) A first film of Mn is formed by CVD, the first film covering the inner surface of the concave portion and the upper surface of the insulating film. (a3) Conductive material essentially consisting of Cu is deposited on the first film to embed the conductive material in the concave portion. (a4) The semiconductor substrate is annealed. During the period until a barrier layer is formed having also a function of improving tight adhesion, it is possible to ensure sufficient tight adhesion of wiring members and prevent peel-off of the wiring members.

Method of manufacturing semiconductor device suitable for forming wiring using damascene method

A semiconductor device includes an insulating film including oxygen formed over a semiconductor substrate, a recess formed in the insulating film, a refractory metal film formed on the inner wall of the recess, a metal film including copper, manganese, and nitrogen formed on the refractory metal film, and a copper film formed on the metal film to fill in the recess.

Semiconductor device with reduced increase in copper film resistance

A method for fabricating a semiconductor device includes the steps of forming an opening defined by an inner wall surface in an insulation film, forming a Cu&#x2014;Mn alloy layer in the opening, depositing a Cu layer on the Cu&#x2014;Mn alloy layer and filling the opening with the Cu layer, and forming a barrier layer as a result of reaction between Mn atoms in the Cu&#x2014;Mn alloy layer and the insulation film, wherein the step of forming the barrier layer is conducted by exposing the Cu layer to an ambient that forms a gaseous reaction product when reacted with Mn.

Fabrication method of semiconductor device having a barrier layer containing Mn

A semiconductor device has a first insulating film formed over a semiconductor substrate, a first opening formed in the first insulating film, a first manganese oxide film formed along an inner wall of the first opening, a first copper wiring embedded in the first opening, and a second manganese oxide film formed on the first copper wiring including carbon.

Semiconductor device and method of manufacturing the same

An interlayer insulating film having a concave portion is formed on a semiconductor substrate. A tight adhesion film is formed on the inner surface of the concave portion and the upper surface of the insulating film. The surface of the adhesion layer is covered with an auxiliary film made of Cu alloy containing a first metal element. A conductive member containing a second metal element other than the first metal element is embedded in the concave portion, and deposited on the auxiliary film. Heat treatment is performed to make atoms of the first metal element in the auxiliary film segregate on the inner surface of the concave portion. The adhesion layer contains an element for enhancing tight adhesion of the auxiliary film more than if the auxiliary film is deposited directly on a surface of the interlayer insulating film. During the period until the barrier layer having also the function of enhancing tight adhesion, it becomes possible to retain sufficient tight adhesion of a wiring member and prevent peel-off of the wiring member.

Manufacture method for semiconductor device suitable for forming wirings by damascene method and semiconductor device

A method for fabricating a semiconductor device has forming an opening defined by an inner wall surface in an insulation film, covering said inner wall surface with a Cu&#x2014;Mn alloy layer, depositing a first Cu layer over said Cu&#x2014;Mn alloy layer without exposing said Cu&#x2014;Mn alloy layer to the air, depositing a second Cu layer over said first Cu layer and filling said opening with said second Cu layer, and forming a barrier layer over said inner wall surface as a result of a reaction between Mn in said Cu&#x2014;Mn alloy layer and said insulation film.

Fabrication process of a semiconductor device

An insulating film having a concave portion is formed on a semiconductor substrate. The inner surface of the concave portion and the upper surface of the insulating film are covered with an auxiliary film made of Cu alloy containing a first metal element other than Cu. A conductive member containing Cu as a main composition is deposited on the auxiliary film, the conductive member being embedded in the concave portion. Heat treatment is performed in an atmosphere containing P compound, Si compound or B compound. With this method, a content of element other than Cu in the conductive member can be reduced and a resistivity can be lowered.

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Kawasaki, Japan

Nobuyuki Ohtsuka