Hitachi, Ltd.

Hitachi-high-technologies Corporation

Tokyo Electron Limited

Tokyo Electron Yamanashi Limited

Junkosha Co., Ltd.

Nobuyuki Negishi

Masaru Izawa

Kenetsu Yokogawa

Shinichi Tachi

Naoyuki Kofuji

Ken'etsu Yokogawa

Yoshinori Momonoi

Masatoshi Miyake

Masami Kamibayashi

Keizo Suzuki

Masahito Mori

Hiroyuki Kobayashi

Masahiro Sumiya

Satoru Yamashita

Hiroaki Ishimura

Takumi Tandou

Masatoshi Oyama

Hiroshi Marumo

Shoichi Kanai

In the plasma etching method, a sample is placed on a stage in a chamber. A first gas is introduced into the chamber. Electric field is supplied within the chamber to plasma is generated from the first gas. A first RF power of a first frequency, which is for generating a bias voltage in the sample for etching the sample with radicals which are generated in the plasma while the plasma is generated, is supplied to the stage. A second gas is introduced from a position in outer periphery of a surface of the stage, on which the sample is placed. A second RF power of a second frequency higher than the first frequency and capable of generating plasma from the second gas above the stage that allows radicals generated in the plasma generated from the second gas to be supplied in the outer periphery, is supplied to the stage.

Plasma etching method

In a process of dividing gates of multi-layered films in fabricating a NAND flash memory having a three-dimensional structure, a pattern is prevented from deforming and falling. A ratio of a length L to a height h of control gate groups configuring a memory cell of the flash memory is set to be less than 1.65 which is a range in which buckling does not occur. It is desirable that a ratio of a length L to a width W of the control gate groups is set to be less than 16.5.

Semiconductor device manufacturing method

In order to provide a plasma sterilization apparatus with high plasma generation efficiency, the apparatus includes first and second electrodes (), a first dielectric body layer (), and an insulating spacer (). The first dielectric body layer () is disposed between the first and second electrodes (). The insulating spacer () is disposed between the first electrode () and the first dielectric body layer (). The insulating spacer () has a lower permittivity than a permittivity of the first dielectric body layer ().

Plasma sterilization apparatus

It is an object to provide a high-precision method for forming deep holes of elliptic pattern, which can improve hole directionality on the short diameter side, the hole directionality being possibly deteriorated as a result of excessive polymer deposition in the initial etching stage. The insulating film dry etching method is for treating a work on which a mask of elliptic pattern is formed with a fluorocarbon gas, wherein the etching process is divided into a first and second steps after the etching is started, the first step operating to deposit a polymer at a rate set lower than that in the second step, and controlling step time in accordance with ellipticity (long diameter/short diameter ratio) of the elliptic pattern.

Dry etching method of insulating film

A condition without using Ar as plasma gas is applied to processing of an organic anti-reflection-coating, which suppresses a spatter effect and decreases the cleavage of C&#x2014;H and OC&#x2014;O bonds in a resist. As a result, roughness of the resist after processing the anti-reflection-coating can be suppressed, and pitting and striations after processing a next film to be processed, that is an insulating film, can be prevented. For a rare gas to be used at the time of processing the insulating film, any one of Xe, Kr, a mixed gas of Ar and Xe, and a mixed gas of Ar and Kr is applied in place of Ar, giving rise to reduction in pitting and striations after etching. In addition, a dry etching method with less critical-dimension shift and excellence in both apparatus cost and throughput can be provided by performing resist modification and etching by turns.

Dry etching method and apparatus

The object of this invention is to provide a method for fabricating a semiconductor device in which the yield and productivity are improved. In the method for fabricating a semiconductor device according to the invention, a plasma etching system is prepared which includes a vacuum chamber, a susceptorarranged in the vacuum chamberto place a wafer, a gas introducing meansto introduce the material gas into the vacuum chamber and a high-frequency power introducing means. The gas introduced into the vacuum chamber by the gas introducing meansis converted into a plasma by the high-frequency power, and a plurality of holes are selectively formed in the oxide filmof a main wafer surface in a plasma atmosphere. In the hole forming step, lighthaving a continuous spectrum is irradiated on a flat portion and a hole portion of the main surface of the semiconductor wafer thereby to measure the reflectivity change in the flat portion and the hole portion.

Method for fabrication semiconductor device

Automatic generation of processing conditions will be provided, based on a database and process modeling by a computer equipped in semiconductor device fabrication equipment, by using input of wafer processing history including the thickness and quality. The computer equipped in semiconductor device fabrication equipment obtains the wafer processing and inspection results from a production line management computer in order to assist input of the process history. The computer in the fabrication equipment can be connected to computers in a fabrication equipment manufacturer on a communication network to automatically provide process conditions and maintenance schedule.

Method of manufacturing a semiconductor device and manufacturing system

Disclosed is a process for fabricating a semiconductor device, which efficiently suppresses a damage layer formed on a base silicon substrate or an interconnection layer and removes a high resistivity layer in the formation of a contact hole, thereby reducing a contact resistance. The contact hole is formed in an etching step of reducing ion energy and an oxygen flow rate as an etching depth progresses, thereby suppressing the damage layer formed on the base. The reduction of the contact resistance is achieved by using a step of removing the high resistivity layer using hydrogen or a hydrogen-containing gas plasma.

Process for fabricating semiconductor device

A dry etching apparatus and method which can uniformly and stably generate a high-density plasma over a wide range, and can cope with increase of wafer diameter and making the pattern finer in etch processing of the fine pattern of a semiconductor device. The apparatus and method enables a magnitude of a magnetic field to be cyclically modulated when a substrate to be treated is etch processed. The cyclical modulation may be effected by cyclically modulating a coil current flowing to a solenoid coil.

Dry etching device and dry etching method

A parallel plate ECR plasma processing system is able to extend a plasma density region capable of keeping a continuous, uniform state. In this system, a first magnetic field-forming means formed of a solenoid coil and a second magnetic field-forming means are provided so that a the distribution of a direction of a magnetic line of flux on the surface of a planar plate is controlled by a combined magnetic field from the first and second magnetic field-forming means thereby controlling the distribution in degree of the interactions of the magnetic field and an electromagnetic wave. This control ensures the uniformity of a plasma under high density plasma formation conditions, thus enabling one to form a continuous plasma over a wide range of low to high densities. Thus, there can be realized a plasma processing system that ensures processing under wide plasma conditions including high-speed processing under high density conditions.

Plasma processing system and method for manufacturing a semiconductor device by using the same

An etching method capable of obtaining a fine fabricated shape, particularly, a vertical fabricated shape with less bowing upon fabrication of insulation films in the production of semiconductors, the method comprising controlling the incident amount of O, F or N radicals, gas flow rate or consumption amount of O, F and N on the inner wall surface with etching time to suppress excessive O, F and N which become excessive in the initial stage of etching, the method also including control for the flow rate or the consumption amount based on the result of measurement for plasmas during etching so as to obtain a stable etching shape. Since bowing can be reduced upon fabrication of insulation film hole and insulation film while maintaining the etching rate and the selectivity, finer semiconductor device can be produced easily.

Plasma treatment apparatus and plasma treatment method

A probe card is electrically connected to a tester, electrically contacted and connected to circuits to be tested, and used to transmit test signals between the tester and the circuits. It includes a plate assembly having a printed board and an earth plate insulated from each other. Probe assemblies are supported by the plate assembly and are substantially vertically contacted at their foremost ends with pads of the circuits to be tested. Each probe assembly includes a center conductor having a sharpened tip contacted with the pad of the circuit to be tested. A holder conductor shrouds the center conductor while leaving the front end portion thereof not enclosed, and having electrical continuity with the center conductor. A dielectric shrouds the holder conductor, a peripheral conductor coaxially arranged around the holder conductor with the dielectric interposed between them, and a sheath enclosing the peripheral conductor. The upper end of the holder conductor is electrically connected to a circuit on the printed board while the upper end of the peripheral conductor is electrically connected to a circuit on the earth plate.

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Tokyo, Japan

Nobuyuki Negishi