Kobe Steel, Ltd.

Kabushiki Kaisha Kobe Seiko Sho

Other

Kabushiki Kaisha Kobe Seiko Sho (Kobe Steel, Ltd.)

Kobelco Research Institute, Inc.

Nobuyuki Kawakami

Mototaka Ochi

Kazushi Hayashi

Yoshihiro Yokota

Yoshito Fukumoto

Aya Miki

Hiroshi Goto

Takashi Kinoshita

Toshihiro Kugimiya

Takayuki Hirano

Katsufumi Tomihisa

Takeshi Tachibana

Kohei Suzuki

Aya Hino

Takeshi Nogami

Koichi Ikeda

Shinya Morita

Naoki Komai

Kenichi Inoue

Hiroshi Gotoh

Hiroshi Gotou

Masakatsu Maruyama

Shinya Fukuma

Junichi Nakai

Koji Kobashi

Katsutoshi Takagi

Kimitsugu Saito

Takahiko Ishii

Yoshihiko Sakashita

Yusuke Muraoka

Ryuji Kitakado

Katsumi Watanabe

Yoichi Inoue

Tomomi Iwata

Chitaka Manabe

Ikuo Mizobata

Masato Kannaka

Katsuhiro Uehara

Takashi Miyake

Takashi Kobori

Yuki Iwasaki

Hiroyuki Okuno

Masaya Ehira

Akira Nanbu

Yuichi Taketomi

Toshiro Kugimiya

Provided is a method for simply evaluating defects caused in interface states in oxide semiconductor thin films and protective films in TFTs having protective films formed on the surface of oxide semiconductor thin films without actually measuring the characteristics of the same. This evaluation method evaluates defects caused in the interface states by measuring electron states in the oxide semiconductor thin film by a contact method or noncontact method. The defects caused in the interface states are any of the following: (1) threshold value voltage (V) when a positive bias is applied to the thin-film transistor, (2) difference in threshold value voltage (&#x394;V) before and after applying the positive bias to the thin-film transistor, and (3) threshold value during the first measurement when a plurality of measurements is made of the threshold value voltage when a positive bias is applied to the thin-film transistor.

Quality evaluation method for laminate having protective layer on surface of oxide semiconductor thin film and quality control method for oxide semiconductor thin film

The present invention provides a method for accurately and easily measuring/evaluating/predicting/estimating the electrical resistance of an oxide semiconductor thin film, and a method for managing the film quality. The method for evaluating an oxide semiconductor thin film includes: a first step for irradiating, with excitation light and microwave, a sample on which an oxide semiconductor thin film is formed, measuring the maximum value of the reflected microwave by the thin film which changes due to the excitation light irradiation, then stopping the excitation light irradiation and measuring the change in reflectivity of the microwave from the thin film after the excitation light irradiation has been stopped; and a second step for calculating a parameter corresponding to the slow decay observed after the excitation light irradiation has been stopped from the change in the reflectivity and evaluating the electrical resistivity of the oxide semiconductor thin film.

Method for evaluating oxide semiconductor thin film, method for managing quality of oxide semiconductor thin film, and evaluation element and evaluation device used in above evaluation method

Provided is a method for reliably and simply evaluating the quality of an oxide semiconductor thin film and a laminated body having a protective film on the surface of this oxide semiconductor thin film. Also provided is a method for reliably and simply managing the quality of an oxide semiconductor thin film. This method, which is for evaluating the quality of an oxide semiconductor thin film and a laminated body having a protective film on the surface of this oxide semiconductor thin film, has: a first step, wherein an oxide semiconductor thin film is formed on a substrate, after which the electron state of the oxide semiconductor thin film is measured by a contact method or a noncontact method, thereby evaluating defects arising from in-film defects in the oxide semiconductor thin film; and a second step, wherein the oxide semiconductor thin film is processed on the basis of a condition determined on the basis of that evaluation, after which a protective film is formed on the surface of the oxide semiconductor thin film, and then the electron state of the oxide semiconductor thin film is measured by a contact method or a noncontact method, thereby evaluating defects arising from defects at the interface between the oxide semiconductor thin film and the protective film.

Method for evaluating quality of oxide semiconductor thin film and laminated body having protective film on surface of oxide semiconductor thin film, and method for managing quality of oxide semiconductor thin film

The present invention provides an Al alloy film for a display device, to be directly connected to a conductive oxide film on a substrate, the Al alloy film comprising Ge in an amount of 0.05 to 0.5 at %, and comprising Gd and/or La in a total amount of 0.05 to 0.45 at %, a display device using the same, and a sputtering target for the display device. For the Al alloy film of the present invention, even when a barrier metal is not provided, and a conductive oxide film and the Al alloy film are directly connected, the adhesion between the conductive oxide film and the Al alloy film is high, and the contact resistivity is low, and preferably, the dry etching property is also excellent.

Al alloy film for display device, display device, and sputtering target

Provided is a direct contact technology by which a barrier metal layer between a Cu alloy wiring composed of pure Cu or a Cu alloy and a semiconductor layer can be eliminated, and the Cu alloy wiring can be directly and surely connected to the semiconductor layer within a wide process margin. The wiring structure is provided with the semiconductor layer and the Cu alloy film composed of pure Cu or the Cu alloy on a substrate in this order from the substrate side. A laminated structure is included between the semiconductor layer and the Cu alloy film. The laminated structure is composed of an (N, C, F) layer, which contains at least one element selected from among a group composed of nitrogen, carbon and fluorine, and a Cu&#x2014;Si diffusion layer, which contains Cu and Si, in this order from the substrate side. Furthermore, at least the one element selected from among the group composed of nitrogen, carbon and fluorine is bonded to Si contained in the semiconductor layer.

Wiring structure, thin film transistor substrate, method for manufacturing thin film transistor substrate, and display device

An interconnection structure, containing a substrate and, in the following order from a side of the substrate: (I) a semiconductor layer; (II) a multilayer structure including (II-a) a first layer containing at least one type of an element selected from the group consisting of nitrogen, carbon and fluorine and (II-b) an Al&#x2014;Si diffusion layer containing Al and Si; and (III) an Al film of pure Al or an Al alloy, wherein the at least one of element selected from the group consisting of nitrogen, carbon, and fluorine in the first layer is bonded with Si contained in the semiconductor layer.

Interconnection structure, a thin film transistor substrate, and a manufacturing method thereof, as well as a display device

The present invention provides a thin film transistor substrate and a display device in which a decrease in the dry etching rate of a source electrode and drain electrode is not caused; no etching residues are generated; and a barrier metal can be eliminated between a semiconductor layer and metal wires such as the source and drain electrodes. The present invention is a thin film transistor substrate having a semiconductor layer, a source electrode, a drain electrode, and a transparent conductive film, in which the source electrodeand drain electrodeare formed by patterning by means of dry etching and comprises an Al alloy thin film comprising 0.1 to 1.5 atom % of Si and/or Ge, 0.1 to 3.0 atom % of Ni and/or Co, and 0.1 to 0.5 atom % of La and/or Nd, and the thin film transistor is directly connected with the semiconductor layer

Thin film transistor substrate and display device

The present invention relates to an Al&#x2014;Ni&#x2014;La&#x2014;Si system Al-based alloy sputtering target including Ni, La and Si, in which, when a section from (&#xbc;)t to (&#xbe;)t (t: thickness) in a cross section vertical to a plane of the sputtering target is observed with a scanning electron microscope at a magnification of 2000 times, (1) a total area of an Al&#x2014;Ni system intermetallic compound having an average particle diameter of 0.3 &#x3bc;m to 3 &#x3bc;m with respect to a total area of the entire Al&#x2014;Ni system intermetallic compound is 70% or more in terms of an area fraction, the Al&#x2014;Ni system intermetallic compound being mainly composed of Al and Ni; and (2) a total area of an Al&#x2014;Ni&#x2014;La&#x2014;Si system intermetallic compound having an average particle diameter of 0.2 &#x3bc;m to 2 &#x3bc;m with respect to a total area of the entire Al&#x2014;Ni&#x2014;La&#x2014;Si system intermetallic compound is 70% or more in terms of an area fraction, the Al&#x2014;Ni&#x2014;La&#x2014;Si system intermetallic compound being mainly composed of Al, Ni, La, and Si.

Al-Ni-La-Si system Al-based alloy sputtering target and process for producing the same

It is intended to provide a membrane structure element that can be easily manufactured, has an excellent insulating property and high quality; and a method for manufacturing the membrane structure element. The manufacturing method is for manufacturing a membrane structure element including a membrane formed of a silicon oxide film and a substrate which supports the membrane in a hollow state by supporting a part of a periphery of the membrane. The method includes: a film formation step of forming a heat-shrinkable silicon oxide filmon a surface of a silicon substrateby plasma CVD method; a heat treatment step of performing a heat treatment to cause the thermal shrinkage of the silicon oxide filmformed on the substrate; and a removal step of removing a part of the substratein such a manner that a membrane-corresponding part of the silicon oxide filmis supported as a membrane in a hollow state with respect to the substrateto form a recessed part

Membrane structure element and method for manufacturing same

This invention is intended to provide a layered structure in which Al alloy is directly connected to transparent oxide conducting layer without increasing electrical contact resistance between the two, with wiring resistance held low and galvanic corrosion being less likely to occur in developing solution or other electrolyte fluids, and the manufacturing method of such layered structure. The manufacturing method intended to provide such layered structure composed of the Al alloy and the transparent oxide conducting layer directly connected to each other, includes a first process to form the above transparent oxide conducting layer on a substrate, a second process to form, on the transparent oxide conducting layer, an Al alloy layer containing alloy components having less ionization tendency than aluminum, and a third process to heat the above Al alloy layer at a temperature equal to or higher than the temperature at which interchemical compound between aluminum and the above alloy components can be separated out.

Layered structure and its manufacturing method

Disclosed are a thin film transistor substrate where barrier metal can be omitted to be formed between a semiconductor layer of a thin film transistor and source and drain electrodes (barrier metal need not be formed between the semiconductor layer of the thin film transistor and the source and drain electrodes), and a display device. (1) A thin film transistor substrate has a semiconductor layer of a thin film transistor, a source electrode, a drain electrode, and a transparent conductive film, wherein the substrate has a structure in which the source and drain electrodes are directly connected to the semiconductor layer of the thin film transistor, and the source and drain electrodes include an Al alloy thin film containing Ni of 0.1 to 6.0 atomic percent, La of 0.1 to 1.0 atomic percent, and Si of 0.1 to 1.5 atomic percent. (2) A display device has the thin film transistor substrate.

A dielectric line having a sufficient ensured strength and being suitable for mass production and a production method therefor are provided. The production method is a method for manufacturing a dielectric line having a dielectric strip which is provided between two conductive plates approximately parallel to each other and which has a width smaller than that of the conductive plates, and dielectric medium layers which are filled between the conductive plates other than the dielectric strip and which is composed of a porous material having a dielectric constant smaller than that of the dielectric strip. The dielectric line (NRD guide) is produced by film forming steps Sand Sin which a film of a dielectric raw material is formed on one of the conductive plates, a strip exposure step Sin which a part of the above film having a shape corresponding to the dielectric strip is exposed to predetermined light, beams, or vapor, and pore forming steps Sand Sin which the entire film of the dielectric raw material is made porous.

Dielectric line and production method therefor

A source/drain electrode is used in a thin-film transistor substrate containing a substrate, a thin-film transistor semiconductor layer, source/drain electrodes, and a transparent picture electrode. The source/drain electrode includes a nitrogen-containing layer and a thin film of pure aluminum or an aluminum alloy. Nitrogen of the nitrogen-containing layer binds to silicon of the thin-film transistor semiconductor layer, and the thin film of pure aluminum or aluminum alloy is connected to the thin-film transistor semiconductor layer through the nitrogen-containing layer.

Source/drain electrodes, thin-film transistor substrates, manufacture methods thereof, and display devices

A feed antenna includes a pair of conductive members, a dielectric waveguide placed therebetween, a dielectric member that is placed between the conductive members and located close to the dielectric waveguide, and a plurality of dielectric binding sections for binding the dielectric waveguide to the dielectric member. One of the conductive members has a plurality of openings.

Feed antenna including dielectric waveguide

An ultraviolet sensor includes a substrate; a diamond layer, placed on the substrate, functioning as a detector; and at least one pair of surface electrodes arranged on the diamond layer. The diamond layer has a detecting region present at the surface thereof, the detecting region has at least one sub-region exposed from the surface electrodes, and the sub-region has a covering layer, made of oxide or fluoride, lying thereon. A method for manufacturing the ultraviolet sensor includes a step of forming a diamond layer, functioning as a detector, on a substrate; a step of forming at least one pair of surface electrodes on the diamond layer; and a step of forming a covering layer, made of oxide or fluoride, on at least one sub-region of a detecting region present at the surface of the diamond layer, the sub-region being exposed from the surface electrodes.

Ultraviolet sensor and method for manufacturing the same

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Kobe, Japan

Nobuyuki Kawakami