Fujitsu Corporation

Fujitsu Semiconductor Limited

Nobuyoshi Nakaya

Yoshiharu Kato

Kazufumi Komura

Shigetaka Asano

Tohru Yasuda

Keiichi Fujimura

Takayoshi Nakamura

Kanta Yamamoto

Katsumi Furukawa

Hirohisa Nishiyama

A semiconductor device includes a monitor including a first element coupled between a first power supply line and a second power supply line, and a load for increasing a load value between the first element and the first power supply line or the second power supply line, and a determination unit which determines an operating state of the first element based on an output of the monitor.

Semiconductor device and operation monitoring method for semiconductor device

A semiconductor memory device comprises a plurality of memory cells for storing cell data. Word lines are connected to the memory cells. A first bit line includes a primary bit line connected to each memory cell and a secondary bit line. A first switching circuit is connected between the primary and secondary bit lines. A sense amplifier is connected to the secondary bit line. A second bit line is connected to the sense amplifier. A second switching circuit is connected between the second bit line and one of the primary and secondary bit lines.

Semiconductor memory, data read method for semiconductor memory and data

Growing community of inventors

Kasugai, Japan

Nobuyoshi Nakaya