Sharp Kabushiki Kaisha Corporation

National Institute of Advanced Industrial Science and Technology

Kanazawa University

Xenogenic Development Limited Liability Company

Nobuyoshi Awaya

Kazuya Ishihara

Yukio Tamai

Yasunari Hosoi

Mitsuru Nakura

Takashi Nakano

Shinobu Yamazaki

Yoshiji Ohta

Takahiro Takimoto

Kazuhiro Natsuaki

Shigeo Ohnishi

Suguru Kawabata

Masayo Uchida

Junya Onishi

Shinji Kobayashi

Hiroyuki Akinaga

Toshimasa Suzuki

Hidechika Kawazoe

Kohji Inoue

Hisashi Shima

Akihito Sawa

Fumiyoshi Takano

Yuji Nishi

Kenichi Tanaka

Hidetoshi Masuda

Keizo Sakiyama

Shinichi Sato

Masayuki Fujimoto

Masayuki Ehiro

Hidenori Morimoto

Masayuki Tajiri

Yushi Inoue

Koji Inoue

Akiyoshi Seko

Atsushi Shimaoka

Yuji Matsushita

Isao Inoue

Yoshiaki Tabuchi

Naoto Hagiwara

Kunihiko Orita

Kazunori Fujisawa

Akio Kitagawa

Kazuya Nakayama

A photoelectric conversion device includes: a first optical filter that has a first pattern periodically having a plurality of structures and is formed of a conductive material film disposed on a first photoelectric conversion element with an insulating film therebetween; and a first optical filter that has a second pattern periodically having a plurality of structures and is formed of a conductive material film disposed on a second photoelectric conversion element with the insulating film therebetween. The interval between the first pattern and the second pattern that are adjacent to each other is longer than a period of the structures in the first pattern and a period of the structures in the second pattern.

Photoelectric conversion device

A photoelectric conversion device capable of preventing anomalous transmission of light of a wavelength that is not supposed to be transmitted and reducing the half-width of a spectral waveform and a method for manufacturing such a photoelectric conversion device are provided. A first photoelectric conversion element is formed on a substrate. A first metal film having a plurality of openings arranged periodically or aperiodically is formed above the first photoelectric conversion element with insulating films interposed therebetween. A second metal film covering a part of the openings in the first metal film is provided.

Photoelectric conversion device and method for manufacturing same

An optical filter configured to transmit light of a predetermined wavelength includes a substrate; a first conductive thin film that is disposed on the substrate and has apertures extending through the first conductive thin film and arranged with a period of less than the predetermined wavelength; and a second conductive thin film at least a portion of which faces the apertures so as to be separated from the apertures.

Optical filter configured to transmit light of a predetermined wavelength

A semiconductor memory device includes a writing circuit and a reading circuit. The writing circuit executes a setting action for converting a resistance of a variable resistance element to a low resistance by applying current from one end side to the other end side of a memory cell via the variable resistance element, and a resetting action for converting the resistance to a high resistance by applying current from the other end side to the one end side via the variable resistance element. The reading circuit executes a first reading action for reading a resistance state of the variable resistance element by applying current from one end side to the other end side of the memory cell via the variable resistance element, and a second reading action for reading the resistance state by applying current from the other end side to the one end side via the variable resistance element.

Semiconductor memory device and semiconductor device

A nonvolatile semiconductor memory device include: a two terminal structured variable resistive element, wherein resistive characteristics defined by current-voltage characteristics at both ends transit between low and high resistance states stably by applying a voltage satisfying predetermined conditions to the both ends. A transition from the low resistance state to the high resistance state occurs by applying a voltage of a first polarity whose absolute value is at or higher than first threshold voltage, and the reverse transition occurs by applying a voltage of a second polarity whose absolute value is at or higher than a second threshold voltage. A load circuit is connected to the variable resistive element in series having an adjustable load resistance. A voltage generation circuit applies a voltage to both ends of a serial circuit. The variable resistive element can transit between the states by adjusting a resistance of the load circuit.

Nonvolatile semiconductor memory device

The invention provides a semiconductor memory device including a variable resistance element capable of decreasing a variation of a resistance value of stored data due to a large number of times of switching operations and capable of performing a stable writing operation. The device has a circuit that applies a reforming voltage pulse to a memory cell including a variable resistance element of a degraded switching characteristic and a small read margin due to a large number of times of application of a write voltage pulse, to return each resistance state of the variable resistance element to an initial resistance state. By applying the reforming voltage pulse, the variable resistance element can recover at least one resistance state from a variation from the initial resistance state, and can recover the switching characteristic. Accordingly, there is obtained a semiconductor memory device in which a reduction of a read margin is suppressed.

Semiconductor memory device

In a semiconductor memory device using a variable resistive element made of a metal oxide for storing information, a voltage amplitude of a writing voltage pulse for changing the variable resistive element to a high resistance state is set within a voltage range in which the resistance value of the high resistance state after the change increases with time. The voltage amplitude is set within the voltage range in which the resistance value of the high resistance state after the change increases toward a predetermined peak with increase in voltage amplitude. When a data error is detected by the ECC circuit, it is estimated that the data that should be in the low resistance state changes to the high resistance state, and the variable resistive elements of all memory cells from which the error is detected are written to the low resistance state to correct the error bit.

The invention realizes a semiconductor memory device that can efficiently execute a detection of a data error that might possibly occur in a continuous reading action, and a correction of the error data. The semiconductor memory device uses a variable resistive element made of a metal oxide for storing information. During a reading action of coded data with an ECC in the semiconductor memory device, when a data error is detected by an ECC circuit, a writing voltage pulse having a polarity opposite to a polarity of a reading voltage pulse is applied to all memory cells from which the error is detected so as to correct bits from which the error is detected, on an assumption that an erroneous writing has occurred due to the application of the writing voltage pulse having the polarity same as the polarity of the applied reading voltage pulse.

A variable resistance element that can stably perform a switching operation with a property variation being reduced by suppressing a sharp current that accompanies completion of forming process, and a non-volatile semiconductor memory device including the variable resistance element are realized. The non-volatile semiconductor memory device uses the variable resistance element for storing information in which a resistance changing layer is interposed between a first electrode and a second electrode, and a buffer layer is inserted between the first electrode and the resistance changing layer where a switching interface is formed. The buffer layer and the resistance changing layer include n-type metal oxides, and materials of the buffer layer and the resistance changing layer are selected such that energy at a bottom of a conduction band of the n-type metal oxide configuring the buffer layer is lower than that of the n-type metal oxide configuring the resistance changing layer.

Non-volatile semiconductor device

A semiconductor memory device includes a memory cell array where a plurality of memory cells are arranged in a matrix, each of the memory cells serially connecting a two-terminal type memory element and a transistor for selection, a first voltage applying circuit that applies a write voltage pulse to a bit line, and a second voltage applying circuit that applies a precharge voltage to a bit line and a common line. In writing the memory cell, after the second voltage applying circuit has both terminals of the memory cell previously precharged to the same voltage, the first voltage applying circuit applies the write voltage pulse to one terminal of the writing target memory cell via the bit line, and while the write voltage pulse is applied, the second voltage applying circuit maintains the application of the precharge voltage to the other terminal of the memory cell via the common line.

Semiconductor memory device and method of driving the same

A three-dimensional memory cell array of memory cells with two terminals having a variable resistive element is formed such that: one ends of memory cells adjacent in Z direction are connected to one of middle selection lines extending in Z direction aligned in X and Y directions; the other ends of the memory cells located at the same point in Z direction are connected to one of third selection lines aligned in Z direction; a two-dimensional array where selection transistors are aligned in X and Y directions is adjacent to the memory cell array in Z direction; gates of selection transistors adjacent in X direction, drains of selection transistors adjacent in Y direction and sources of selection transistors are connected to same first selection line, second selection line, and different middle selection lines, respectively; and first, second and third selection lines are connected to X, Y and Z decoders, respectively.

Nonvolatile semiconductor memory device and manufacturing method for same

A large-capacity and inexpensive nonvolatile semiconductor memory device that prevents a leak current and is operated at high speed is implemented with a nonvolatile variable resistive element. A memory cell array includes the nonvolatile variable resistive elements each including a variable resistor composed of a metal oxide film to cause a resistance change according to an oxygen concentration in the film, an insulation film formed on the variable resistor, first and second electrodes to sandwich the variable resistor, and a third electrode opposite to the variable resistor across the insulation film. A writing operation is performed by applying a voltage to the third electrode to induce an electric field having a threshold value or more, in a direction perpendicular to an interface between the variable resistor and the insulation film, and a resistance state of the variable resistor is read by applying a voltage between the first and second electrodes.

Nonvolatile variable resistive element and nonvolatile semiconductor memory device

A memory cell array having a 1R structure is composed of nonvolatile variable resistive elements each including a variable resistor formed of a metal oxide film whose resistance changes depending on an oxygen concentration in the film, and first and second electrodes sandwiching the variable resistor. The first electrode and the variable resistor form a rectifier junction through a rectifier junction layer composed of an oxide layer and a layer (oxygen depletion layer) of the metal oxide film having an oxygen concentration lower than a stoichiometric composition. The oxygen moves between the first electrode and the metal oxide film when a voltage is applied, and a thickness of the oxygen depletion layer changes, so that the resistance of the metal oxide film changes and the rectifying properties are provided. A thickness of the oxygen depletion layer is set to allow the variable resistive element to show the sufficient rectifying properties.

A nonvolatile semiconductor memory device includes a bit voltage adjusting circuit which, for each bit line, fixes potentials of a selected bit line and a non-selected bit line to a predetermined potential to perform a memory operation and a data voltage adjusting circuit which, for each data line, fixes potentials of a selected data line and a non-selected data line to a predetermined potential to perform a memory operation. Each of the voltage adjusting circuits includes an operational amplifier and a transistor, a voltage required for a memory operation is input to the non-inverted input terminal of the operational amplifier, and the inverted input terminal of the operational amplifier is connected to the bit line or the data line, so that the potential of the bit line or the data line is fixed to a potential of the non-inverted input terminal of the operational amplifier.

A nonvolatile semiconductor memory device includes a memory cell array for storing user data provided by arranging memory cells each having a variable resistive element having a first electrode, a second electrode, and a variable resistor made of a metal oxide sandwiched between the first and second electrodes. The first and second electrodes are formed of a conductive material forming ohmic junction with the variable resistor and a conductive material forming non-ohmic junction with the variable resistor, respectively. The variable resistor changes between two or more different resistance states by applying a voltage between the electrodes. The resistance state after being changed is maintained in a nonvolatile manner. The variable resistive elements of all memory cells in the memory cell array are set to the highest of the two or more different resistance states in an unused state before the memory cell array is used to store the user data.

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Osaka, Japan

Nobuyoshi Awaya