Mitsubishi Denki Kabushiki Kaisha

Mitsubishi Electric Semiconductor Software Co., Ltd

Mitsubishi Electric System Lsi Design Corporation

Renesas Technology Corp.

Lowe, Price, Leblanc & Becker

Nobuya Uda

Hiroyuki Maemura

An input circuit of a one-chip microcomputer is connected to an external switching circuit. When an analog input signal of a significant level generated in the external switching circuit is received at an analog input terminal of the input circuit, an A/D conversion start request signal is generated in an A/D conversion start request generating circuit and is sent to an A/D converter. The operation of the A/D converter is started in response to the A/D conversion start request signal, the analog input signal received at the analog input terminal is converted into digital data, and an A/D conversion finish signal is sent from the A/D converter to a CPU of the one-chip microcomputer. The operation of the CPU is started in response to the A/D conversion finish signal, and the digital data is readout to the CPU. Therefore, the A/D converter, the CPU or a clock is not operated to wait for an analog input signal generated in the external switching circuit, but the A/D converter is operated for the A/D conversion, and the CPU is operated to read out the digital data. Accordingly, an electric power consumed in the A/D converter, the CPU and the clock can be reduced.

One-chip microcomputer with analog-to-digital converter

An operation mode transfer system capable of solving a problem of a conventional system in that a processing load of a host computer cannot be reduced as long as a device is physically connected with the host computer because the host computer must carry out, even when the device is inoperative, the same communication processing as that performed when the device is operative. The present system connects a pullup resistor to a pullup power supply to set the device operative, and disconnects it from the pullup power supply to set the device inoperative, in response to the instructions from a CPU of the device.

Operation mode transfer system and method

A semiconductor integrated circuit comprising a terminal connected to the ground potential between an input and an output terminal of an oscillator so that a ground wire pattern of sufficient width is provided between the input and output terminals on the wiring substrate.

Semiconductor integrated circuit having a grounding terminal

A D/A converter arranged to improve the resolution by changing the number of resistors to be interposed between a resistance ladder, from which a divided voltage between positive and negative voltage sources is taken out, and the positive and negative voltage sources while maintaining the total resistance value at a constant value, in which the resistance value of the resistor to be interposed between the resistance ladder and the positive and negative voltage sources is selected to uniformly lower the divided voltage which is taken by the resistance ladder by a level corresponding to 1/2 LSB to perform 1/2 LSB correction.

Resistance ladder, D/A converter and A/D converter

An analog-to-digital converter includes a comparator for comparing a voltage output by a digital-to-analog converter with an input analog voltage at each bit of an n-bit word. The input analog voltage and the analog output voltage of the digital-to-analog converter are alternatingly used as the reference in the comparison, i.e., for every other bit of the n bits. A one-bit result-of-comparison signal indicative of the result of the comparison is output for each of the n bits. Only alternating result-of-comparison signals are inverted and the inverted and non-inverted result-of-comparison signals are stored in a successive approximation register as the converted digital signal and are supplied to the digital-to-analog converter for use in the comparison.

Analog-to-digital converter with digital-to-analog converter and

A resistance ladder which divides a potential difference between two power sources into 2.sup.m levels by a resistance group in the center portion, then adjusting the number of resistors which are disposed at the both end portions of the resistance ladder and interposed between the resistors of the center portion and the two power sources so that the division voltages of 2.sup.m levels are changed in (n-m) levels, with the result that the potential difference is divided into 2.sup.n levels. A D-A converter uses the resistance ladder. An A-D converter with the D-A converter which generates a reference voltage to be compared with an input voltage.

Resistance ladder, D-A converter, and A-D converter

A signal input/output circuit for a semiconductor integrated circuit being provided with a reset signal input/output terminal 1 which inputs external reset requesting signal REQ from the outside of the semiconductor integrated circuit 10 and outputs internal reset requesting signal TWD generated at the inside, and a reset signal input circuit 3 which is connected to the reset signal input/output terminal 1 through the protection resistance 4 and generates reset signal RST resetting the semiconductor integrated circuit 10 when the external reset requesting signal REQ is inputted to the reset signal input/output terminal 1. In addition, the signal input/output circuit includes a first N-channel transistor 6 whose source is connected to the ground voltage source of the semiconductor integrated circuit 10 and whose drain is connected to the end of the reset signal input/output terminal 1 side of a protection resistance 4, and with a second N-channel transistor 7 whose source is connected to the ground voltage source of the semiconductor integrated circuit 10, and whose drain is connected to the end of the reset signal input circuit 3 side of the same.

Growing community of inventors

Itami, Japan

Nobuya Uda