Renesas Electronics Corporation

Hitachi, Ltd.

Other

Hitachi Haramachi Electronics Co., Ltd.

Renesas Technology Corp.

Hitachi Tohbu Semiconductor, Ltd.

Nobuya Koike

Atsushi Nishikizawa

Yukihiro Sato

Hiroyuki Nakamura

Akira Muto

Ichio Shimizu

Atsushi Fujiki

Toshiyuki Hata

Kuniharu Muto

Jyunichi Tsuchiya

Ryuichi Saito

Yoshihiko Koike

Hideya Kokubun

Hiroshi Sato

Akira Tanaka

Kazuji Yamada

Kazuhiro Suzuki

Masahiro Koizumi

Jin Onuki

Isao Kobayashi

Yasutoshi Kurihara

Mamoru Sawahata

Keiichi Okawa

Tadao Kushima

Takashi Haramaki

Yutaka Higashimura

Shigeki Sekine

Tsukasa Matsushita

Takashi Hosokawa

Hideo Shimizu

Masaki Kotsuji

Yukihiro Narita

Kisho Ashida

Katsuhiko Funatsu

Norio Kido

Tatsuhiro Seki

Makoto Tanaka

Makoto Kitano

Akihiro Nakahara

Hisanori Okamura

Yuichi Machida

Noboru Baba

Masaki Tamura

Shinya Nagata

Keita Takada

Masahiko Sakamoto

Katsuo Arai

Hirosi Akiyama

Sigeki Sekine

A semiconductor device and an electronic device are improved in performances by supporting a large current. An emitter terminal protrudes from a first side of a sealing body, and signal terminals protrude from a second sides of the sealing body. Namely, the side of the sealing body from which the emitter terminal protrudes and the side of the sealing body from which the signal terminals protrude are different. More particularly, the signal terminals protrude from the side of the sealing body opposite the side thereof from which the emitter terminal protrudes. Further, a second semiconductor chip including a diode formed therein is mounted over a first surface of a chip mounting portion in such a manner as to be situated between the emitter terminal and the a first semiconductor chip including an IGBT formed therein in plan view.

Semiconductor device and an electronic device

A power MOSFET and a sense MOSFET for detecting a current of the power MOSFET are formed in a semiconductor chip, and a source pad and a Kelvin pad are formed of a source electrode for the power MOSFET. The source pad is a pad for outputting the current flowing to the power MOSFET, and the Kelvin pad is a pad for detecting a source potential of the power MOSFET. The source electrode has a slit, and at least a part of the slit is arranged between the source pad and the Kelvin pad when seen in a plan view.

Semiconductor device

There is provided a technology enabling the improvement of the reliability of a semiconductor device manufactured by physically fixing separately formed chip mounting portion and lead frame. A feature of an embodiment resides in that, a second junction portion formed in a suspension lead is fitted into a first junction portion formed in a chip mounting portion, thereby to physically fix the chip mounting portion and the suspension lead. Specifically, the first junction portion is formed of a concave part disposed in the surface of the chip mounting portion. The second junction portion forms a part of the suspension lead.

Semiconductor device and a manufacturing method thereof

It is made for the layout of the mounting wiring at the time of mounting to become efficient by changing the structure of a semiconductor device. A first chip is mounted on a first die pad, and a second chip is also mounted on a second die pad. A first die pad and a second die pad do division structure in parallel to the first side and second side of sealing body. As a result, the pin for an output from a first chip and the pin for control of the circuit for a drive can make it able to project from a counter direction, and can set the wiring layout at the time of mounting as the minimum route.

A semiconductor chip in which a power MOSFET is placed above a semiconductor chip in which another power MOSFET is formed and they are sealed with an encapsulation resin. The semiconductor chips are so arranged that the upper semiconductor chip does not overlap with a gate pad electrode of the lower semiconductor chip in a plan view. The semiconductor chips are identical in size and the respective source pad electrodes and gate pad electrodes of the lower semiconductor chip and the upper semiconductor chip are identical in shape and arrangement. The lower semiconductor chip and the upper semiconductor chip are arranged with their respective centers displaced from each other. Accordingly, the size of a semiconductor device can be reduced.

Semiconductor device for a DC-DC converter

To prevent, in a resin-sealed type semiconductor package, generation of cracks in a die bonding material used for mounting of a semiconductor chip. A semiconductor chip is mounted over the upper surface of a die pad via a die bonding material, followed by sealing with an insulating resin. The top surface of the die pad to be brought into contact with the insulating resin is surface-roughened, while the bottom surface of the die pad and an outer lead portion are not surface-roughened.

Semiconductor device and manufacturing method thereof

To improve the performance and reliability of semiconductor devices. For the semiconductor chip CP, power MOSFETs Qand Qfor the switch, a diode DDfor detecting the heat generation of the power MOSFET Q, a diode DDfor detecting the heat generation of the power MOSFET Q, and plural pad electrodes PD are formed. The power MOSFET Qand the diode DDare arranged in a first MOSFET region RGon the side of a side SD, and the power MOSFET Qand the diode DDare arranged in a second MOSFET region RGon the side of a side SD. The diode DDis arranged along the side SD, the diode DDis arranged along the side SD, and all pad electrodes PD other than the pad electrodes PDSand PDSfor the source are arranged along a side SDbetween the diodes DDand DD

An SiP (semiconductor device) using a stacked packaging method for stacking a microcomputer IC chip over a driver IC chip in which circuits sensitive to heat or noise, including an analog to digital conversion circuit, a digital to analog conversion circuit, a sense amplifier circuit of a memory (RAM or ROM), or a power supply circuit of a microcomputer IC chip, are prevented from two-dimensionally overlapping with a driver circuit of the lower-side driver IC chip to reduce, during the operation, the effect of heat or noise, which the circuits sensitive to heat or noise of the microcomputer IC chip receive from the driver circuit of the lower-side driver IC chip, thereby improving the operation stability of the SiP (semiconductor device) using the stacked packaging method.

Semiconductor device with non-overlapped circuits

The semiconductor device includes a semiconductor chip, a chip mounting portion, a suspension lead, and a plurality of leads. Each of the plurality of leads has a first part and a second part, and the suspension lead has a first part and a second part. The first part of each of the plurality of leads and the suspension lead project from the plurality of side surfaces of the sealing body, respectively. Parts of the side surfaces of the plurality of leads and the suspension lead are exposed from the plurality of side surfaces of the sealing body, respectively. An area of the obverse surface of the first part of the suspension lead is larger than an area of the obverse surface of the first part of each of the plurality of leads in a plan view.

Semiconductor device with the leads projected from sealing body

There is a need for providing a technology capable of decreasing on-resistance of a power transistor in a semiconductor device that integrates the power transistor and a control integrated circuit into a single semiconductor chip. There is another need for providing a technology capable of reducing a chip size of a semiconductor device. A semiconductor chip includes a power transistor formation region to form a power transistor, a logic circuit formation region to form a logic circuit, and an analog circuit formation region to form an analog circuit. A pad is formed in the power transistor formation region. The pad and a lead are connected through a clip whose cross section is larger than that of a wire. On the other hand, a bonding pad is connected through the wire.

Semiconductor connection component

Growing community of inventors

Tokyo, Japan

Nobuya Koike